Probabilistic Counter for Network Traffic Measurement
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
High numbers of counters in modern network devices, such as Openflow switches, lead to memory access speed degradation and inefficient use of cache resources due to the high burden on memory bus and cache architecture.
Innovation Solution
Implementing a counting unit with a processing unit that increments counter values only with a probability p < 1, reducing the number of memory accesses by approximating the number of traffic events, allowing for efficient counting of data packets while minimizing memory usage.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Measurement precision
If the number of counters is increased to provide proper usage statistics for multiple ports and routing entries, then the measurement precision is improved, but the memory access speed degrades due to high burden on memory bus and cache architecture
Solution Approach 1:
The patent applies partial action by incrementing counters only with a probability p < 1 rather than for every packet. This selective counting reduces memory access frequency while still providing statistically meaningful usage statistics. The probabilistic approach allows the system to obtain sufficient measurement precision without the full overhead of counting every single packet event.
2Speed
If cache is used to speed up memory transactions, then the memory access speed is improved, but valuable cache space is consumed which could be used for other purposes
Solution Approach 1:
By incrementing counters probabilistically rather than for every packet, the patent reduces the frequency of memory access transactions. This partial action approach maintains acceptable memory access speed without requiring extensive cache space, as fewer memory writes are needed compared to traditional per-packet counting.
3Measurement precision
If a high number of counters is used to track traffic for multiple flow tables, then the measurement precision is improved, but the device complexity increases and memory bus burden increases
Solution Approach 1:
The patent reduces device complexity by implementing probabilistic counter incrementation, which decreases the frequency of memory access operations. This approach maintains adequate traffic measurement precision across multiple flow tables while reducing the burden on the memory bus and simplifying counter management compared to tracking every single packet event.
Data Source
Figure 1
Figure 2
Figure 3
AI summary
The invention relates to a counting unit (100) configured to count an amount of traffic events of a data packet traffic. The counting unit comprises a counting element (131 ) configured to store a value representing the amount of traffic events, The counting unit further comprises a processing unit (120-123) configured to detect an arrival of each data packet of the data packet traffic at the processing unit, to process each data packet and to determine whether the value at counting element (131 ) should be increased each time the arrival of one data packet is detected at the processing unit, wherein the processing unit (120-123) is configured to store a probability value pc <1 indicating a probability that the processing unit increases the value at the counting element each time the arrival of one data packet is detected at the processing unit, wherein the processing unit is configured such that when it detects the arrival of one data packet at the processing unit, it increases the value at the counting element only with the probability pc.