Signal Acquisition Probe Reducing Capacitive Loading

Resolve Bottlenecks,
Find Innovative Solutions
Generate Solutions

Solution Overview

Problem

Traditional passive voltage probes load the device under test due to high probe tip capacitance, which affects bandwidth and signal-to-noise ratio, and existing solutions either increase resistance, reducing signal input or require adjustments that compromise frequency response.

Innovation Solution

A signal acquisition system with a signal acquisition probe and a signal processing instrument having mismatched time constants, utilizing a compensation system with pole-zero pairs and adjustable feedback loop circuitry to maintain flat frequency response, and reducing probe tip capacitance to increase high-frequency input impedance.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Measurement precision

If traditional passive voltage probes are used, then the probe provides voltage measurement capability, but the high probe tip capacitance loads the device under test and reduces bandwidth

Engineering Contradiction:
Improvevoltage measurement capabilityVSAvoidcapacitive loading on device under test
Core Design Contradiction:
Measurement precisionVSObject-affected harmful factors

Solution Approach 1:

The patent changes the key parameter of probe tip capacitance from traditional high values (8-12 pF) to a reduced value (2-5 pF). This parameter change directly reduces the capacitive loading effect on the device under test while maintaining the voltage measurement function. The reduced capacitance increases the probe bandwidth and minimizes signal degradation.

Inventive Principle:
Principle #35Parameter changes

2Speed

If probe tip capacitance is reduced to increase bandwidth, then the capacitive loading is reduced, but the signal-to-noise ratio may be compromised

Engineering Contradiction:
Improveprobe bandwidthVSAvoidsignal-to-noise ratio
Core Design Contradiction:
SpeedVSReliability

Solution Approach 1:

The patent employs feedback loop circuitry with adjustable resistive and capacitive elements that form pole-zero pairs. This feedback mechanism compensates for the reduced capacitance effects and maintains a flat frequency response across the extended bandwidth. The feedback system actively adjusts to preserve signal integrity and signal-to-noise ratio while benefiting from the reduced capacitive loading.

Inventive Principle:
Principle #23Feedback

3Object-affected harmful factors

If resistance is increased to compensate for reduced capacitance, then the capacitive loading is reduced, but the signal input to the oscilloscope is reduced

Engineering Contradiction:
Improvecapacitive loadingVSAvoidsignal input level
Core Design Contradiction:
Object-affected harmful factorsVSQuantity of substance

Solution Approach 1:

The patent introduces feedback loop circuitry as an intermediary mechanism between the reduced capacitance and the signal path. This intermediary system uses adjustable resistive and capacitive elements to compensate for signal level changes without requiring a simple increase in probe tip resistance. The feedback mechanism restores and maintains adequate signal input levels to the oscilloscope while preserving the benefits of reduced capacitive loading.

Inventive Principle:
Principle #24Intermediary (Mediator)

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

The system reduces capacitive loading on the device under test, increases bandwidth, and maintains a signal-to-noise ratio equivalent to existing passive voltage probes while providing a wider probe bandwidth.

Implementation Method 1

The compensation system has a feedback loop circuitry with adjustable resistive and capacitive elements that form pole-zero pairs for compensating mismatched time constants of the probe tip circuitry, signal cable, and input circuitry across the frequency bandwidth of the signal acquisition system

Methodology Applied
Scientific EffectPole-zero cancellation:

Implementation Method 2

The probe tip circuitry has an effective input capacitance of 2-5 picofarads which reduces capacitive loading of a device under test. The reduced capacitance increases the high frequency input impedance of the probe

Methodology Applied
Scientific EffectCapacitance reduction: Capacitance

Data Source

PatentEP2306209B1Signal acquisition system having reduced probe loading of a device under test
Publication Date: 2022.05.25 TEKTRONIX INC
  • EP2306209B1 patent drawingFigure 1
  • EP2306209B1 patent drawingFigure 2
  • EP2306209B1 patent drawingFigure 3~4

AI summary

A signal acquisition system (50) has a signal acquisition probe (52) having probe tip circuitry coupled to a resistive center conductor signal cable (54). The resistive center conductor signal cable of the signal acquisition probe is coupled to a compensation system (68) in a signal processing instrument via an input node and input circuitry in the signal processing instrument. The signal acquisition probe and the signal processing instrument have mismatched time constants at the input node with the compensation system providing pole-zero pairs for maintaining flatness over the signal acquisition system frequency bandwidth.