Probe Card Substrate Structure for 3DIC Verification and Coplanarity
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Solution Overview
Problem
Existing methods for testing integrated circuit (IC) devices are not entirely satisfactory in ensuring the functionalities of smaller and more complex IC devices.
Innovation Solution
The development of a substrate structure for probe card applications, which includes a redistribution layer, test pads, a first protective coating, conductive pads, and passive devices, to improve the testing and examination of semiconductor devices.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If existing testing methods are used for 3D packaging and 3DIC devices, then the testing process is simplified, but the verification capability and yield are insufficient
Solution Approach 1:
The substrate structure is segmented into distinct functional regions: a core substrate region containing passive devices for intermediate verification, and a probe card region for final testing. This segmentation allows verification functions to be separated from the main IC device testing, enabling independent optimization of each region's capabilities.
Solution Approach 2:
The patent introduces a vertical stacking dimension by integrating the core substrate with passive devices beneath the redistribution layer. This three-dimensional arrangement enables intermediate verification functionality to be embedded within the substrate structure itself, rather than requiring separate external testing equipment.
2Productivity
If intermediate verification testing is implemented, then the yield is improved, but the device complexity and manufacturing cost increase
Solution Approach 1:
The patent merges the verification testing function directly into the substrate structure by integrating passive devices (capacitors, inductors, resistors) into the core substrate region. This combination eliminates the need for separate external verification equipment and enables intermediate testing to be performed during the manufacturing process itself.
Solution Approach 2:
The core substrate with passive devices is prepared in advance as a separate component before being bonded to the redistribution layer. This preliminary preparation allows verification testing to be performed at an intermediate stage during manufacturing, enabling early detection of defects before final IC device assembly.
3Reliability
If probe cards are used for testing, then the testing functionality is provided, but the coplanarity and electromigration issues arise
Solution Approach 1:
The substrate structure acts as an intermediary between the IC device and the probe card. By integrating the verification function into the substrate itself, the patent reduces the reliance on external probe cards and their associated coplanarity issues. The substrate structure provides a stable, integrated interface that maintains precise electrical connections throughout the testing process.
Data Source
AI summary
A substrate structure includes a core substrate, a redistribution layer, a plurality of test pads, a first protective coating, at least one conductive pad and a passive device. The redistribution layer is disposed on and electrically connected to the core substrate. The test pads are disposed over the redistribution layer. The first protective coating is coated on the test pads. The conductive pad is d disposed on the redistribution layer aside the plurality of test pads. The passive device is disposed on and electrically connected to the at least one conductive pad.