Probe Card Loopback Impedance Matching for High-Frequency Tests
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
High-frequency test signals in semiconductor devices experience impedance mismatch and signal integrity issues due to mismatched characteristic impedances in the probe device and system impedance, leading to poor return loss and insertion loss, especially at frequencies above 10 GHz.
Innovation Solution
The probe card design includes a wiring substrate, connection carrier board with loopback lines, and probe devices forming differential pairs, with adjusted loopback line impedance to match the system impedance, reducing impedance mismatch and improving signal integrity.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Speed
If the test frequency is increased to achieve high-frequency testing, then the testing capability is improved, but impedance mismatch and signal integrity deterioration occur
Solution Approach 1:
The patent adjusts the characteristic impedance of the loopback line to match the system impedance (e.g., both set to 100 ohms). This parameter change in impedance design eliminates impedance mismatch at high frequencies, allowing the test frequency to be increased without degrading signal integrity. The matching of impedance parameters between different components resolves the contradiction between high-frequency capability and signal quality.
2Adaptability or versatility
If the loopback line path is extended to accommodate device design constraints, then the device design flexibility is improved, but impedance mismatch and return loss worsen
Solution Approach 1:
The patent designs the loopback line with a specific characteristic impedance that matches the system impedance, regardless of the path length. By controlling the impedance parameter of the loopback line (through conductor width, spacing, substrate properties), the patent ensures that even extended paths do not cause impedance mismatch. This allows the loopback line to be extended to accommodate device design constraints while maintaining good return loss characteristics.
3Device complexity
If the probe device and system impedance are not matched, then the device complexity is reduced, but insertion loss and signal integrity deteriorate
Solution Approach 1:
The patent sets the characteristic impedance of the loopback line to match the system impedance (both 100 ohms). This parameter matching eliminates the need for complex external impedance matching circuits or adjustments. By designing the loopback line with matched impedance from the outset, the patent reduces insertion loss while avoiding additional device complexity, as the impedance matching is achieved through the inherent design of the loopback line itself.
Data Source
AI summary
A probe card, a method for designing the probe card, a method for producing a tested semiconductor device, a method for testing an unpackaged semiconductor by the probe card, a device under test, and a probe system are provided. The probe card includes a wiring substrate, a connection carrier board, and a probe device. At least two probes form a differential pair electrically connected to a loopback line of the connection carrier board to form a test signal loopback path. The probe device has a probe device impedance on the test signal loopback path. The loopback line has a loopback line impedance on the test signal loopback path. A difference between the probe device impedance on the test signal loopback path and the loopback line impedance on the test signal loopback path is in an impedance range.