Probe Card Resistive Termination for Signal Integrity
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Solution Overview
Problem
Existing semiconductor testing methods face challenges in reducing rise and fall times of test signals due to capacitive loads, particularly when testing multiple devices in parallel, which can lead to design constraints and signal integrity issues as frequency increases.
Innovation Solution
A probe card assembly with a signal path having a trace and trace stubs, where a resistive termination is coupled between the trace and a potential, effectively absorbing signal reflections and reducing rise and fall times by matching impedance and minimizing reflections.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If test signals are fanned out to multiple DUTs through trace stubs in a probe card assembly, then the number of devices that can be tested in parallel increases, but the rise and fall times of the test signal increase due to capacitive loads
Solution Approach 1:
A resistive termination network is introduced as an intermediary component between the trace stubs and the DUTs. This termination network, consisting of resistors connected to ground and power rails, acts as a mediator that absorbs signal energy and controls the capacitive loading effect, thereby reducing rise and fall times while maintaining the ability to test multiple devices in parallel
Solution Approach 2:
The patent modifies the electrical parameters of the signal path by adding resistive elements that change the impedance characteristics of the trace stubs. By carefully selecting resistor values, the overall capacitance effect is reduced, allowing for faster signal transitions without limiting the number of parallel test channels
2Productivity
If the number of test channels in the tester is increased to test more DUTs, then the testing capacity increases, but the cost of the test system increases significantly
Solution Approach 1:
The probe card assembly is designed with multi-functional trace stubs that can serve multiple DUTs simultaneously. Each trace stub can connect to multiple DUTs through the resistive termination network, allowing a single test channel to effectively test multiple devices in parallel, thereby reducing the total number of test channels needed in the expensive tester
3Reliability
If the length of stubs is limited or topology is optimized to reduce rise/fall time, then signal integrity improves, but design flexibility and adaptability are constrained
Solution Approach 1:
The patent applies different termination configurations to different trace stubs based on their specific requirements. Each trace stub can have independently adjustable resistive termination values, allowing optimization of signal integrity for each individual connection while maintaining overall design flexibility. This localized approach enables adaptability to different DUT configurations without compromising signal quality
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The resistive termination solution reduces the rise and fall times of test signals applied to semiconductor devices under test, improving signal integrity and allowing for increased parallel testing without compromising signal quality.
Implementation Method 1
a resistive termination coupled between the trace and at least one potential
Implementation Method 2
effectively absorbing signal reflections and reducing rise and fall times by matching impedance
Data Source
AI summary
Apparatus for terminating a test signal applied to multiple semiconductor loads under test is described—for example apparatus for interfacing a test signal between a tester and a semiconductor device under test (DUT). In some examples, a probe card assembly may include at least one probe substrate each having test probes configured to contact test features of a DUT; a wiring substrate, coupled to the at least one probe substrate, having a connector configured for coupling with a source termination of a tester; a signal path formed on and/or in the wiring substrate and the at least one probe substrate, the signal path having a trace and trace stubs fanning out from the trace, an input of the trace being coupled to the connector and outputs of the trace stubs being coupled to the test probes; and a resistive termination coupled between the trace and at least one potential.


