Movable Probe Card Testing Unit for Wafer Efficiency
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Solution Overview
Problem
Traditional multi-site probe cards are limited by layout and probing steps, making them unsuitable for efficient wafer probe testing as chip sizes decrease and pin numbers increase, leading to inefficiencies in testing procedures.
Innovation Solution
A probe card with a plurality of probe sets arranged as a testing unit that moves in specific directions to test multiple dies in a region and then move to adjacent regions, allowing for systematic and efficient testing of multiple dies on a wafer.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If traditional multi-site probe cards are used, then testing can be performed on multiple sites, but the layout and probing steps are restricted making them unsuitable for efficient wafer probe testing
Solution Approach 1:
The probe card is divided into multiple testing units, each comprising multiple probe sets arranged in specific patterns (e.g., 2x2, 3x3 grids). Each testing unit can independently test multiple dies simultaneously, and the entire probe card can test multiple regions across the wafer by moving different testing units to different regions, thereby overcoming layout restrictions and improving testing efficiency
Solution Approach 2:
The patent introduces a two-dimensional arrangement of probe sets within testing units (e.g., rows and columns forming grid patterns), allowing simultaneous testing of multiple dies in both horizontal and vertical directions. This dimensional approach enables efficient coverage of multiple test regions on the wafer surface without being constrained by traditional linear probing layouts
2Adaptability or versatility
If chip size is reduced and pin numbers are increased, then more functionality is achieved, but traditional probe cards become restricted and less suitable for wafer probe testing
Solution Approach 1:
The probe card employs movable testing units that can dynamically reposition themselves to access different test regions on the wafer. The testing units can move along the wafer surface in a systematic pattern (e.g., row-by-row or column-by-column progression), allowing the same probe card structure to adapt to various chip sizes and pin configurations without being restricted by fixed layouts
Solution Approach 2:
The standardized testing unit design with multiple probe sets arranged in configurable patterns can universally test different types of dies regardless of size or pin count. The same testing unit structure can be applied across multiple regions and adapted to various chip configurations, making the probe card versatile for testing modern high-pin-count, small-size chips
3Productivity
If multiple dies are tested simultaneously, then testing efficiency is improved, but systematic movement between regions is required to avoid repeated testing
Solution Approach 1:
The testing units perform continuous systematic movement across the wafer surface, progressing from one test region to the next in an organized sequence (e.g., moving row-by-row or column-by-column). This continuous motion ensures that each die is tested exactly once while maintaining high productivity through simultaneous multi-point testing within each region, avoiding both repeated testing and idle movements
Data Source
AI summary
A probe card and a testing method are disclosed herein. The probe card includes a plurality of probe sets arranged as a testing unit. The testing unit is configured to test a plurality of dies in a test region on a wafer, and to move m unit along a first direction and n unit along a second direction when the test complete so as to test the next test region, in which m and n are integers.