Probe Head PCB Capacitor Embedding for Probe Inductance Compensation
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Solution Overview
Problem
Conventional probe heads face challenges in positioning capacitors close to probes due to limited space on the periphery of the space transformer, leading to fluctuations in ground planes when testing high power chips.
Innovation Solution
Vertically embed capacitors in the printed circuit board of the probe head to ensure they are close to the probes, utilizing the component real estate and providing short vertical connections via the space transformer.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If capacitors are disposed on the periphery of the space transformer, then the PCB layout is simplified, but the capacitors are too far from the probes causing increased inductance
Solution Approach 1:
The patent transitions from a two-dimensional peripheral arrangement of capacitors on the PCB to a three-dimensional configuration where capacitors are embedded within the PCB layers. This vertical integration allows capacitors to be positioned much closer to the probe contact points, reducing the inductance loop area while maintaining PCB layout simplicity through standardized multi-layer construction.
Solution Approach 2:
The capacitors are nested within the internal layers of the multi-layer PCB structure, with power and ground planes surrounding them. This nesting approach embeds the capacitors in the component real estate of the PCB itself, allowing close proximity to probes through the space transformer while utilizing the vertical space efficiently.
2Reliability
If capacitors are placed close to the probes, then inductance compensation is improved, but the available space on the PCB periphery is insufficient
Solution Approach 1:
By moving from a planar surface-mount approach to a multi-layer embedded configuration, the patent exploits the vertical dimension of the PCB. This allows capacitors to be positioned close to probe locations without consuming additional peripheral surface area, effectively increasing component placement flexibility within the existing PCB footprint.
Solution Approach 2:
Capacitors are nested within the internal PCB layers, utilizing the component real estate inside the PCB structure rather than on the surface. This nesting enables close proximity to probes while preserving the limited peripheral space for other components and connections.
3Ease of manufacture
If conventional peripheral capacitor placement is used, then PCB manufacturing is simpler, but ground plane fluctuations occur during high power testing
Solution Approach 1:
The capacitors are nested within the multi-layer PCB structure with power and ground planes embedded around them. This configuration creates compact, low-inductance loops that effectively suppress ground plane fluctuations during high power switching events, while the PCB is manufactured using standard multi-layer fabrication processes.
Solution Approach 2:
The transition to multi-layer embedded capacitor configuration reduces the loop area for high current paths by utilizing vertical connections through vias. This dimensional change minimizes inductance and its associated ground plane fluctuations, while maintaining compatibility with conventional PCB manufacturing techniques for multi-layer boards.
Data Source
AI summary
Passive electrical components (e.g., capacitors) are vertically embedded in the printed circuit board of the probe head. The resulting configuration ensures the components are close to their corresponding probes by making use of the component real estate of the printed circuit board, and by having relatively short vertical connections to the probes (via the space transformer). As a result, improved compensation of probe inductance is provided for probe arrays.