Probe Pad Repair via Chemical Mechanical Polish

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Solution Overview

Problem

Probe pad damage caused by probe tips during inline testing leads to test failures, under-etched vias, and outgassing issues, affecting the adhesion and reliability of subsequent layers, resulting in lower yields per wafer.

Innovation Solution

Chemical mechanical polishing (CMP) is applied to the probe pads after each inline test to remove displaced material and repair the damage, planarizing the surface and preventing further issues.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If probe tips are used to contact probe pads during inline testing, then electrical properties can be tested, but probe pad damage occurs forming scrub marks with peaks and valleys

Engineering Contradiction:
Improveelectrical testing reliabilityVSAvoidprobe pad surface flatness
Core Design Contradiction:
ReliabilityVSManufacturing precision

Solution Approach 1:

A planarization layer is formed over the probe pad before inline testing. This preliminary action prevents the probe tip from directly contacting and damaging the probe pad surface, while still allowing electrical contact through the planarization layer. The planarization layer absorbs the mechanical stress and prevents scrub mark formation.

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

The patent introduces a planarization layer as an intermediary between the probe tip and the probe pad. This intermediate layer serves as a buffer that protects the probe pad from direct mechanical contact while maintaining electrical connectivity, thus resolving the contradiction between enabling testing and preventing surface damage.

Inventive Principle:
Principle #24Intermediary (Mediator)

2Reliability

If probe tips are pushed across the probe pad surface to ensure electrical communication, then reliable electrical contact is achieved, but the probe pad surface develops peaks and valleys that impact adhesion

Engineering Contradiction:
Improveelectrical communication reliabilityVSAvoidsubsequent layer adhesion
Core Design Contradiction:
ReliabilityVSStrength

Solution Approach 1:

The planarization layer is formed in advance to create a flat surface that prevents the formation of peaks and valleys during probing. This preliminary protective action ensures that subsequent layers can be deposited with proper adhesion without being compromised by surface irregularities.

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

The planarization layer acts as a mediator that decouples the mechanical probing action from the probe pad surface. It allows electrical contact to be made while preventing the mechanical stress from creating surface defects that would harm adhesion of subsequent layers.

Inventive Principle:
Principle #24Intermediary (Mediator)

3Loss of time

If inline testing is performed at intermediate stages, then wafer failures can be detected early, but probe tip induced damage lowers yields per wafer

Engineering Contradiction:
Improvedefect detection timeVSAvoidyields per wafer
Core Design Contradiction:
Loss of timeVSProductivity

Solution Approach 1:

By forming the planarization layer before inline testing, the patent enables early defect detection while protecting against yield loss. The planarization layer is prepared in advance to prevent damage during the necessary probing operations, thus maintaining both early detection capability and high yield.

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

The planarization layer serves as a protective intermediary that allows inline testing to proceed without causing damage. It enables the manufacturing process to benefit from early defect detection while minimizing the harmful effects of probe tip contact, thereby maintaining high yields per wafer.

Inventive Principle:
Principle #24Intermediary (Mediator)

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

The CMP process effectively removes ridges and divots formed by probe tips, improving the adhesion and reliability of subsequent layers, reducing the occurrence of test failures and increasing yields by minimizing probe tip-induced damage.

Implementation Method 1

The substrate, including the probe pad, is subjected to a chemical mechanical polish to planarize the portion of the probe pad that extends above the top surface

Methodology Applied
Scientific EffectChemical mechanical polishing:

Data Source

PatentUS8822994B2Method of repairing probe pads
Publication Date: 2014.09.02 STMICROELECTRONICS INC
  • US8822994B2 patent drawing
  • US8822994B2 patent drawing
  • US8822994B2 patent drawing

AI summary

A method that includes forming a first level of active circuitry on a substrate, forming a first probe pad electrically connected to the first level of active circuitry where the first probe pad having a first surface, contacting the first probe pad with a probe tip that displaces a portion of the first probe pad above the first surface, and performing a chemical mechanical polish on the first probe pad to planarize the portion of the first probe pad above the first surface. The method also includes forming a second level of active circuitry overlying the first probe pad, forming a second probe pad electrically connected to the second level of active circuitry, contacting the second probe pad with a probe tip that displaces a portion of the probe pad, and chemically mechanically polishing the second probe pad to remove the portion displaced.