Probe Pin with Discharge Electrode for Semiconductor Current Application
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Solution Overview
Problem
Existing methods for applying electric current to semiconductors can cause destruction due to residual electricity, particularly at the gate-emitter locations of lowest withstand voltage, leading to potential damage during the contact process.
Innovation Solution
An electric current application method and device that first contacts a first electrode with the semiconductor to eliminate residual electricity from the first and second electric current carrying parts, followed by contacting a second electrode to conduct the electric current, ensuring no residual electricity is present at the time of main current application, thereby preventing voltage spikes.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If the probe pin contacts the semiconductor directly to conduct high current, then the electric current can be applied efficiently, but residual electricity may cause voltage spikes exceeding the withstand voltage of the gate-emitter, leading to semiconductor destruction
Solution Approach 1:
The probe pin includes a discharge electrode that contacts the semiconductor surface before the main current conducting electrode. This preliminary contact discharges residual electricity from the semiconductor surface through a discharge path, eliminating the harmful voltage spikes that would occur when the main current is applied, thus preventing gate-emitter breakdown while maintaining efficient current application
2Reliability
If the probe pin structure includes multiple electrodes and discharge paths, then residual electricity can be eliminated effectively, but the device structure becomes more complex
Solution Approach 1:
The discharge electrode and current conducting electrode are integrated into a single probe pin structure, with the discharge electrode positioned at the leading end and the current conducting electrode behind it. Both electrodes share the same mechanical support structure (plunger and coil spring), combining multiple functions into one compact device rather than using separate components
Solution Approach 2:
The probe pin is divided into distinct functional zones: a discharge electrode at the leading end for residual electricity elimination, and a current conducting electrode behind it for main current application. The abutting member is also segmented into multiple contacting parts distributed radially, allowing independent optimization of each component's function while maintaining overall structural integrity
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach effectively prevents damage to semiconductors by ensuring residual electricity is eliminated before applying the main electric current, maintaining the semiconductor's integrity during the application process.
Implementation Method 1
a coil spring biasing the plunger so as to cause the abutting member to abut a semiconductor
Implementation Method 2
an abutting member in which a plurality of contacting parts for electrical conductance is formed
Data Source
AI summary
An electric current application method for applying electric current to a power semiconductor 100 having a first signal pin contact region 102 that conducts a first electric current, and a contacting body contact region 101 that electrically connects with the first signal pin contact region 102 and conducts a second electric current, includes a Step S1 of contacting a first signal pin 32 of a probe device 1 to the first signal pin contact region 102 so as to eliminate residual electricity remaining in the first signal pin contact region 102 and contacting body contact region 101; and Steps S3 and S4 of contacting a contacting part 21 of the contacting body 2 of the probe device 1 to the contacting body contact region 101, and conducting the first electric current and second electric current, after Step S1.