Procedure-Level Parallelization in Shared Memory Multiprocessors

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Solution Overview

Problem

Existing parallel processing systems face limitations such as scalability bottlenecks, high power consumption, programming complexity, and inability to efficiently execute programs written in control flow principles, due to issues like lock starvation, complex cache coherency, and limited flexibility in data stream structures.

Innovation Solution

A symmetrical data processing system with multiple executive units connected via an interconnection arrangement, allowing for parallel task execution by calling procedures on any free unit and using tokens for synchronization, and implementing associative memory in software to overcome hardware limitations.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Adaptability or versatility

If hardware associative memory modules are used for data flow processing, then data flow processing capability is improved, but power consumption and heat radiation increase significantly

Engineering Contradiction:
Improvedata flow processing capabilityVSAvoidpower consumption
Core Design Contradiction:
Adaptability or versatilityVSUse of energy by moving object

Solution Approach 1:

The patent replaces hardware associative memory modules with a software-based associative memory implementation running on general-purpose processors. This substitution eliminates the need for specialized hardware while achieving the same data flow processing functionality, thereby reducing power consumption and heat radiation.

Inventive Principle:
Principle #28Mechanics substitution (Replace mechanical system)

Solution Approach 2:

The invention enables general-purpose processors to perform data flow processing through software implementation, making these processors multi-functional. This allows the same hardware to handle both traditional control flow programs and data flow processing without requiring dedicated hardware modules.

Inventive Principle:
Principle #6Universality (Multi-functionality)

2Adaptability or versatility

If hardware associative memory modules are used, then data flow processing is enabled, but the number of modules is limited due to heat radiation

Engineering Contradiction:
Improvedata flow processing capabilityVSAvoidnumber of modules
Core Design Contradiction:
Adaptability or versatilityVSDevice complexity

Solution Approach 1:

The patent replaces physical hardware modules with a software-based implementation that runs on existing processors. This eliminates the physical constraints on the number of modules while maintaining data flow processing capability.

Inventive Principle:
Principle #28Mechanics substitution (Replace mechanical system)

Solution Approach 2:

The invention uses software copies of associative memory functionality rather than physical hardware copies. This allows unlimited instantiation of associative memory structures without increasing physical hardware complexity or heat generation.

Inventive Principle:
Principle #26Copying

3Productivity

If data flow processing is implemented, then processing parallelism is improved, but flexibility in data stream structure is reduced

Engineering Contradiction:
Improveprocessing parallelismVSAvoidflexibility in data stream structure
Core Design Contradiction:
ProductivityVSAdaptability or versatility

Solution Approach 1:

The patent implements a dynamic data stream structure where the format and organization of data can be flexibly defined by software rather than being constrained by fixed hardware structures. This allows the system to adapt data stream formats to suit different processing needs while maintaining parallel execution capability.

Inventive Principle:
Principle #15Dynamics

Data Source

PatentEP3134814B1Program parallelization on procedure level in multiprocessor systems with logically shared memory
Publication Date: 2021.11.17 SCIENSYS
  • EP3134814B1 patent drawingFigure 1
  • EP3134814B1 patent drawingFigure 2
  • EP3134814B1 patent drawingFigure 3a~3d

AI summary

The data processing system comprises: - a plurality of executive units (EUs) and shared memory (10) comprising RAM memory, each executive unit having access to the shared memory and being adapted to execute processing instructions of software procedures stored in the shared memory; and - an interconnection arrangement (20) for connecting any executive unit to any other executive unit. The system is arranged for enabling a software procedure executed on any executive unit to cause the latter to call another software procedure on another executive unit by sending a data stream to it containing a procedure identifier of the other procedure and the parameters for its execution. An executive unit arbiter (30) of the system is able to identify a free executive unit among the executive units. So it is possible for an executive unit to call a procedure on any other executive unit by cooperating with the latter. The system allows to run control-flow based programs, but also data-flow based programs with help on an associative memory 40 which may be implemented in software.