Process Variation Adaptive Voltage and Frequency Control
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Solution Overview
Problem
High power consumption in Very-Large-Scale Integration (VLSI) systems and System on Chip (SoC) leads to increased heat generation and reduced battery life, necessitating a method to control supply voltage/frequency to balance performance and power consumption, with production process variations being a critical factor.
Innovation Solution
A semiconductor device with a data storage system that encodes information about production process variations, allowing for adaptive control of supply voltage and frequency through a decoder and frequency/voltage control blocks, enabling precise adjustment of operational speed and leakage current.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Use of energy by moving object
If supply voltage is lowered to reduce power consumption, then power consumption is reduced, but maximum operable frequency decreases
Solution Approach 1:
The patent implements dynamic voltage and frequency adjustment based on process variation data stored in the semiconductor device. The system dynamically selects optimal voltage and frequency combinations from multiple predefined levels, allowing the operational parameters to adapt to the specific process characteristics of each device, thereby resolving the contradiction between power consumption and operable frequency
Solution Approach 2:
The patent changes the physical parameters of supply voltage and operating frequency based on process variation information. By storing process variation data (such as threshold voltage, mobility, leakage current) in the semiconductor device and using this data to select appropriate voltage/frequency levels, the system optimizes the balance between power consumption and operational speed for each specific device
2Speed
If supply voltage is increased to maintain calculation speed, then maximum operable frequency is maintained, but power consumption increases
Solution Approach 1:
The system dynamically adjusts supply voltage to the minimum level required to maintain acceptable calculation speed, based on the stored process variation data. Instead of using a fixed high voltage to ensure speed, the system selects from multiple voltage levels the lowest one that still meets performance requirements, thereby reducing power consumption while maintaining calculation speed
Solution Approach 2:
The patent utilizes multiple supply voltage levels and adjusts the operating voltage parameter based on process variation characteristics. By changing the voltage parameter to match the specific device characteristics stored in memory, the system achieves optimal performance with minimal power consumption
3Device complexity
If process variation is not considered in voltage/frequency control, then device complexity is reduced, but manufacturing precision and yield are worsened
Solution Approach 1:
The patent performs preliminary measurement and storage of process variation data during or after the manufacturing process. By pre-storing characteristics such as threshold voltage, mobility, and leakage current in the semiconductor device itself, the system eliminates the need for complex real-time measurement and adjustment mechanisms, thereby maintaining simple control architecture while achieving high manufacturing precision and yield
Solution Approach 2:
The semiconductor device stores its own process variation data and uses this self-contained information to guide its own voltage and frequency selection. This self-service approach eliminates the need for external complex characterization systems, achieving both simple device complexity and high manufacturing precision through the device's own stored data
Data Source
AI summary
A device capable of controlling a supply voltage and a supply frequency using information of a manufacturing process variation includes a data storage device storing data indicating performance of the device, a decoder decoding the data stored in the data storage device and outputting decoded data, and a frequency control block outputting a frequency controlled clock signal in response to the decoded data output from the decoder. The device further includes a voltage control block outputting a level controlled supply voltage in response to the decoded data. The voltage control block outputs a body bias control voltage controlling a body bias voltage of at least one of a plurality of transistors embodied in the semiconductor device in response to the decoded data. The performance is operational speed of the device or leakage current of the semiconductor device.