Processing Additive for Single-Component Organic FETs
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Solution Overview
Problem
Current methods for improving the performance of single-component polymer field-effect transistors (FETs) are limited in enhancing mobility and device characteristics, as they rely on optimizing gate dielectric and solvent conditions without significant advancements in polymer materials or processing techniques.
Innovation Solution
Incorporating a processing additive into the solution of a conjugated polymer during fabrication, which is then deposited onto a substrate and annealed, to form an active region in the FET, thereby improving mobility and device performance by modifying the polymer's morphology and interface with the dielectric.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If conventional processing methods (optimizing gate dielectric and solvent conditions) are used, then device fabrication is simplified, but mobility and device characteristics cannot be significantly enhanced
Solution Approach 1:
A processing additive (third component) is introduced as an intermediary substance that mediates between the conjugated polymer and the gate dielectric interface. This additive modifies the polymer morphology and improves interfacial organization, enabling enhanced mobility and device characteristics without fundamentally changing the fabrication process or requiring complex multi-component systems.
2Reliability
If processing additives are added to improve bulk organization in bulk heterojunction, then device properties (fill factor, open-circuit voltage, short-circuit current) increase, but the approach has not been successfully applied to single-component polymer FETs
Solution Approach 1:
The invention changes the processing parameters by introducing a processing additive at controlled concentrations (typically 0.1-10% by weight) to the single-component polymer solution. This parameter modification enables the additive to influence polymer chain organization and interfacial morphology, successfully adapting the bulk heterojunction additive approach to single-component FET systems and achieving improved device properties.
3Reliability
If the active layer-gate dielectric interface is optimized through conventional techniques (dielectric choice, passivation, solvent selection), then device characteristics improve, but saturation mobility remains limited
Solution Approach 1:
The processing additive serves as an intermediary that specifically targets the active layer-gate dielectric interface region. It modifies the polymer morphology in this critical zone, improving chain organization and packing without disrupting the established conventional techniques for dielectric optimization, thereby achieving enhanced saturation mobility while maintaining good device characteristics.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach increases saturation mobility, output current, and on/off ratio, while reducing threshold voltage and enhancing surface roughness, resulting in improved performance compared to FETs processed without additives.
Implementation Method 1
addition of a processing additive helps to improve bulk organization in the bulk heterojunction
Implementation Method 2
improve bulk organization in the bulk heterojunction, leading to a significant increase in all device properties
Implementation Method 3
processing conditions can significantly influence the organization of individual molecules or polymer chains on the gate dielectric
Data Source
AI summary
Methods and compositions to improve the performance of single-component polymer FETs is provided comprising processing a conjugated polymer in the presence of a processing additive. Also provided is a FET device fabricated with a processing additive. Such devices have increased saturation hole and/or electron mobility compared to a control FETs.


