Processing Unit Load Balancing via Balance Counter

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Solution Overview

Problem

Load balancing in parallel computer systems is challenging due to time-varying factors like processor load, network load, and varying block sizes, leading to inefficiencies and increased execution time, especially in all-to-all communication patterns, where traditional methods are time-consuming and costly.

Innovation Solution

A balance counter and load balance parameter are used to determine the optimal overlap between computation and communication execution times, allowing for automatic adjustment of computation and communication task parameters to achieve near-ideal load balancing, reducing the need for complex load balancing schemes and resource-intensive information collection.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Productivity

If traditional load balancing methods are used with all-to-all communication pattern, then communication load can be distributed, but the tuning process becomes time-consuming and costly

Engineering Contradiction:
Improveload balancing efficiencyVSAvoidtuning time
Core Design Contradiction:
ProductivityVSLoss of time

Solution Approach 1:

The patent implements a feedback mechanism where each processor monitors its own execution time and communicates this information to others. The system uses this feedback to automatically adjust computation and communication parameters, eliminating the need for manual tuning while achieving optimal load balancing in all-to-all communication patterns

Inventive Principle:
Principle #23Feedback

Solution Approach 2:

The load balancing system performs self-adjustment by having processors automatically monitor their execution times and modify their own computation and communication parameters. This self-service capability eliminates external intervention and manual tuning, significantly reducing the time required to achieve optimal load distribution

Inventive Principle:
Principle #25Self-service

2Reliability

If computation and communication are sequentially executed, then each task can be completed fully, but processor idle time increases and efficiency decreases

Engineering Contradiction:
Improvetask completionVSAvoidprocessor utilization
Core Design Contradiction:
ReliabilityVSProductivity

Solution Approach 1:

The patent dynamically adjusts the timing and parameters of communication operations based on real-time execution time monitoring. By making communication timing flexible rather than fixed, the system can overlap communication with computation execution, reducing processor idle time while ensuring task completion through adaptive parameter adjustment

Inventive Principle:
Principle #15Dynamics

Solution Approach 2:

The system achieves continuous useful action by overlapping communication operations with computation execution. Instead of sequential execution where processors idle during communication, the patent enables communication to proceed concurrently with computation, maintaining continuous productive activity across all processors

Inventive Principle:
Principle #20Continuity of useful action

3Productivity

If manual tuning of computation and communication parameters is performed, then optimal load balancing can be achieved, but the complexity and resource consumption increase

Engineering Contradiction:
Improveload balancing optimizationVSAvoidtuning complexity
Core Design Contradiction:
ProductivityVSDevice complexity

Solution Approach 1:

The system automatically monitors execution times and adjusts computation and communication parameters without external intervention. Each processor self-monitors its performance and the system collectively optimizes load balancing, eliminating complex manual tuning procedures while achieving optimal parameter configuration

Inventive Principle:
Principle #25Self-service

Solution Approach 2:

The patent automatically modifies computation and communication parameters based on monitored execution times. By dynamically changing parameters such as computation block sizes and communication timing based on real-time performance data, the system achieves optimal load balancing without manual parameter tuning complexity

Inventive Principle:
Principle #35Parameter changes

Data Source

PatentEP4195047A1Processing units, processing device, methods and computer programs
Publication Date: 2023.06.14 INTEL CORP
  • EP4195047A1 patent drawingFigure 1~2
  • EP4195047A1 patent drawingFigure 3a~3b
  • EP4195047A1 patent drawingFigure 4a

AI summary

A first processing unit is provided. The first processing unit comprises one or more interfaces configured to communicate with a plurality of second processing units and processing circuitry configured to control the one or more interfaces. Further, the processing circuitry is configured to perform at least one computation task and to receive information about a performed communication task of each second processing unit of the plurality of second processing units. Further, the processing circuitry is configured to determine a balance counter based on the communication tasks received from each second processing unit of the plurality of second processing units and to adjust a computation task parameter and/or a communication task parameter to improve a load balancing of the first processing unit and/or at least one second processing unit of the plurality of second processing units based on the balance counter.