Processing Unit Synchronization via Data Lines
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Solution Overview
Problem
Existing multicore processing systems face inefficiencies in switching between decoupled parallel and redundant modes, particularly in synchronizing processing units, which can be time-consuming and result in data loss or require lengthy system restarts.
Innovation Solution
A processing apparatus with synchronization data lines and a control unit that copies the states of a reference processing unit to a target processing unit in parallel, allowing for rapid mode switching between decoupled parallel and redundant modes without the need for system resets, using multiplexers to connect and disconnect synchronization data lines under control unit direction.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Adaptability or versatility
If system restart is performed to switch between decoupled parallel mode and redundant mode, then mode switching is achieved, but system availability decreases and initialization time increases
Solution Approach 1:
The patent establishes synchronization data lines and control logic in advance, enabling rapid state copying between processing units when mode switching is required. This preliminary setup eliminates the need for time-consuming system restarts, as the infrastructure for synchronization is already in place to facilitate quick transitions between decoupled parallel mode and redundant mode.
Solution Approach 2:
The patent implements a mechanism where the state of a reference processing unit is copied to a target processing unit through synchronization data lines. This copying approach allows the target unit to quickly assume the required state for the desired operating mode without undergoing a complete system restart, thereby significantly reducing initialization time while maintaining mode switching capability.
2Reliability
If system restart is performed to synchronize processing units, then synchronization is achieved, but device availability decreases
Solution Approach 1:
The patent implements a mechanism where the state of a reference processing unit is copied to a target processing unit through synchronization data lines. This copying approach allows the target unit to quickly assume the required state for the desired operating mode without undergoing a complete system restart, thereby significantly reducing initialization time while maintaining mode switching capability.
Solution Approach 2:
The patent introduces synchronization data lines and a control unit as intermediary components between processing units. These intermediaries facilitate rapid and accurate state transfer without requiring system restarts, thus maintaining synchronization accuracy while preserving device availability during mode transitions.
3Speed
If parallel copying of states is implemented between processing units, then synchronization speed increases, but device complexity increases
Solution Approach 1:
The patent divides the synchronization task into segmented operations: the control unit manages the synchronization process, while separate synchronization data lines handle state transfer between specific processing units. This segmentation allows parallel copying to proceed efficiently without requiring a complete system redesign, balancing synchronization speed improvements with acceptable increases in device complexity.
Data Source
AI summary
A processing apparatus, comprising at least a first processing unit and a second processing unit, is proposed. The first processing unit comprises a set of first stateful elements, the second processing unit comprises a set of second stateful elements. A set of synchronization data lines may connect the first stateful elements to the second stateful elements in a pairwise manner. A control unit may control the first processing unit, the second processing unit and the synchronization data lines so as to copy the states of the first stateful elements in parallel via the synchronization data lines to the second stateful elements in response to a synchronization request. A method of synchronizing the processing units is also proposed.