3D Processor Array Interconnect Circuits for Die Bonding

Solution Overview

Problem

Processor arrays face challenges in efficiently interconnecting and bonding semiconductor dies with different physical orientations, requiring complex routing systems and different types of dies for face-to-face or back-to-back bonding, which increases complexity and costs.

Innovation Solution

The implementation of interconnect circuits with multiplexor structures and symmetrical attachment pads allows for efficient signal exchange between semiconductor dies, enabling bonding of dies with different orientations using the same type of die, and reversing the logical direction of router channels to align interconnections, thus simplifying the bonding process and reducing the need for diverse die types.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Adaptability or versatility

If different types of semiconductor dies are used for face-to-face or back-to-back bonding, then the bonding of dies with different orientations is enabled, but the device complexity and manufacturing costs increase

Engineering Contradiction:

Improvebonding capability for different die orientationsVSAvoidcomplexity of routing system

Core Design Contradiction:

Adaptability or versatilityVSDevice complexity

Solution Approach 1:

The patent implements a universal die design where the same semiconductor die can be bonded in different orientations (face-to-face or back-to-back) by incorporating symmetrical attachment pads and a multiplexor structure that adapts the routing internally. This eliminates the need for different die types for different bonding configurations, reducing device complexity while maintaining versatility.

Inventive Principle:

Principle #6Universality (Multi-functionality)

Solution Approach 2:

The patent uses a multiplexor structure that can reverse the logical direction of router channels to align interconnections when dies are bonded in different orientations. By inverting the signal routing logic rather than changing the physical die structure, the system achieves adaptability without increasing manufacturing complexity.

Inventive Principle:

Principle #13The other way round (Inversion)

2Adaptability or versatility

If different types of semiconductor dies are used for face-to-face or back-to-back bonding, then the bonding of dies with different orientations is enabled, but the manufacturing costs increase

Engineering Contradiction:

Improvebonding capability for different die orientationsVSAvoidmanufacturing cost

Core Design Contradiction:

Adaptability or versatilityVSEase of manufacture

Solution Approach 1:

The patent implements a universal die design where the same semiconductor die can be bonded in different orientations (face-to-face or back-to-back) by incorporating symmetrical attachment pads and a multiplexor structure that adapts the routing internally. This eliminates the need for different die types for different bonding configurations, reducing device complexity while maintaining versatility.

Inventive Principle:

Principle #6Universality (Multi-functionality)

3Adaptability or versatility

If complex routing systems are used to interconnect dies with different orientations, then the bonding flexibility is improved, but the device complexity increases

Engineering Contradiction:

Improvebonding flexibilityVSAvoidcomplexity of routing system

Core Design Contradiction:

Adaptability or versatilityVSDevice complexity

Solution Approach 1:

The patent uses a multiplexor structure that can reverse the logical direction of router channels to align interconnections when dies are bonded in different orientations. By inverting the signal routing logic rather than changing the physical die structure, the system achieves adaptability without increasing manufacturing complexity.

Inventive Principle:

Principle #13The other way round (Inversion)

Solution Approach 2:

The patent implements a dynamic routing system using a multiplexor that can switch between different signal routing modes (normal direction or reversed direction) based on the bonding configuration. This dynamic adaptability allows the same hardware to support multiple bonding orientations without requiring complex static routing designs.

Inventive Principle:

Principle #15Dynamics

Data Source

PatentUS9940302B2Interconnect circuits at three dimensional (3-D) bonding interfaces of a processor array

Publication Date: 2018.04.10 INTERNATIONAL BUSINESS MACHINE CORPORATION

AI summary

Embodiments of the invention relate to processor arrays, and in particular, a processor array with interconnect circuits for bonding semiconductor dies. One embodiment comprises multiple semiconductor dies and at least one interconnect circuit for exchanging signals between the dies. Each die comprises at least one processor core circuit. Each interconnect circuit corresponds to a die of the processor array. Each interconnect circuit comprises one or more attachment pads for interconnecting a corresponding die with another die, and at least one multiplexor structure configured for exchanging bus signals in a reversed order.