Processor Authentication With Context-Linked Instruction Signals
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Solution Overview
Problem
Current processors are vulnerable to cloning and emulation of operating codes, necessitating improved authentication methods.
Innovation Solution
Incorporating a combination circuit that combines decoded instructions with data from a context or result register bank to generate a signed instruction, which is processed by an arithmetic logic unit, producing unique result signals for authentication.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If traditional processor implementation is used, then device complexity is low and ease of manufacture is high, but security against cloning and emulation is poor
Solution Approach 1:
The processor is divided into distinct functional segments: a decoding unit that decodes instructions, a combination circuit that combines decoded instructions with context/register data, and an arithmetic logic unit that processes the combined data. This segmentation allows each component to contribute to authentication security while maintaining manageable complexity.
Solution Approach 2:
A combination circuit is introduced as an intermediary component between the instruction decoding stage and the arithmetic logic unit. This intermediary combines decoded instructions with data from context or result register banks, creating a unique processing path that prevents cloning while integrating seamlessly into the existing processor architecture.
2Reliability
If authentication mechanisms are added to processors, then security against cloning improves, but device complexity increases
Solution Approach 1:
The authentication functionality is merged with the existing processor operations by combining decoded instructions with context or register data through a combination circuit. This merging approach allows authentication to occur as an integrated part of normal processor operation rather than as a separate add-on, simplifying manufacturing.
Solution Approach 2:
The combination circuit serves multiple functions: it processes instructions for normal execution while simultaneously generating unique result signals for authentication purposes. This multi-functionality reduces the need for separate authentication hardware, thereby easing manufacturing complexity.
3Reliability
If unique result signals are generated for authentication, then cloning prevention improves, but processing time increases
Solution Approach 1:
The authentication process operates continuously alongside normal instruction execution without interrupting the processing flow. The combination circuit generates unique result signals in parallel with instruction processing, ensuring that security verification occurs continuously without adding time penalties to instruction execution.
Solution Approach 2:
Context and register data are prepared and stored in advance in dedicated banks, allowing the combination circuit to quickly combine these pre-prepared data elements with decoded instructions. This preliminary preparation eliminates the need for time-consuming data gathering during the authentication process itself.
Data Source
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AI summary
This description relates to a method (100) for authenticating a processor (1000), comprising an arithmetic and logic unit (1060), comprising the following steps: receiving, on a first terminal of the arithmetic and logic unit (1060), at least one operand (OP1, ... OPN) decoded from at least a part of an opcode to be executed (OPCODE); and receiving, on a second terminal of the arithmetic and logic unit (1060), a first instruction (INSTR-SIG) combining a second instruction (INSTR) decoded from the opcode to be executed (OPCODE) and at least one opcode executed previously.