Processor Binding to Reduce Inter-Core Latency

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Solution Overview

Problem

Existing computing systems with multiple processors and memories face performance issues due to inter-processor core communications and memory access latency, particularly when multiple users share resources.

Innovation Solution

The system employs two processors and two sets of memory, where each user is bound to a specific processor and memory, ensuring that processes execute only on the assigned processor and use only the assigned memory, thereby minimizing inter-processor communication and memory access latency.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Productivity

If multiple users share computing resources across multiple processors and memories, then resource utilization increases, but inter-processor communication latency and memory access delays increase

Engineering Contradiction:

Improveresource utilizationVSAvoidinter-processor communication latency

Core Design Contradiction:

ProductivityVSLoss of time

Solution Approach 1:

The system segments computing resources by binding each user to a specific processor and its associated memory, creating isolated execution environments. This segmentation prevents inter-processor communication for user processes while maintaining high resource utilization through efficient process state management and migration capabilities.

Inventive Principle:

Principle #1Segmentation

2Productivity

If processes are migrated between processors for load balancing, then system throughput improves, but communication overhead and execution delays increase

Engineering Contradiction:

Improvesystem throughputVSAvoidprocess migration delay

Core Design Contradiction:

ProductivityVSLoss of time

Solution Approach 1:

The system performs preliminary binding of users to processors at allocation time, establishing optimal execution paths before processes need to run. This preliminary action prevents the need for time-critical process migration during execution, thereby maintaining high throughput without migration-induced delays.

Inventive Principle:

Principle #10Preliminary action

3Loss of time

If users are bound to specific processors, then inter-processor communication is reduced, but resource flexibility and adaptability decrease

Engineering Contradiction:

Improvememory access latencyVSAvoidresource allocation flexibility

Core Design Contradiction:

Loss of timeVSAdaptability or versatility

Solution Approach 1:

The system implements dynamic resource allocation where user-process bindings to processors can be adjusted based on system conditions, workload characteristics, and performance requirements. This dynamic approach maintains low memory access latency through stable bindings while preserving adaptability through controlled reconfiguration capabilities.

Inventive Principle:

Principle #15Dynamics

Data Source

PatentUS20250110793A1Resource allocation to avoid slowdown

Publication Date: 2025.04.03 CFPH LLC

AI summary

An apparatus may include first and second processors. A first user may be bound to the first processor such that processes of the first user execute on the first processor and do not execute on the second processor. A second user may be bound to the second processor such that processes of the second user execute on the second processor and do not execute on the first processor.