Processor Bitmap Scheduling for Task Performance and Idle Power Saving

Resolve Bottlenecks,
Find Innovative SolutionsGenerate Solutions

Solution Overview

Problem

Existing power-saving technologies for computer devices adversely affect operating performance by requiring processors to exit power-saving states for task processing, leading to inefficiencies and longer processing times.

Innovation Solution

A processor scheduling method that utilizes processor bitmaps to distinguish active and idle processors, allowing efficient power state adjustments and task processing on active processors while idle processors are placed in power-saving modes.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Use of energy by moving object

If processors enter power-saving modes to reduce power consumption, then power efficiency is improved, but operating performance deteriorates due to longer task processing times

Engineering Contradiction:

Improvepower consumptionVSAvoidoperating performance

Core Design Contradiction:

Use of energy by moving objectVSProductivity

Solution Approach 1:

The system segments processors into active and idle sets based on workload distribution. By using processor bitmaps to track which processors are active versus idle, the system can apply different power states to different processor subsets, allowing power-saving modes to be applied only to idle processors while maintaining performance for active ones.

Inventive Principle:

Principle #1Segmentation

Solution Approach 2:

The system dynamically adjusts processor power states based on real-time workload changes. Processors transition between active and idle states as needed, with the system continuously monitoring and updating processor bitmaps to manage power states adaptively, ensuring optimal balance between power savings and performance.

Inventive Principle:

Principle #15Dynamics

2Use of energy by moving object

If all processors are placed in power-saving modes to maximize power efficiency, then power consumption is reduced, but system reliability decreases due to longer wake-up times

Engineering Contradiction:

Improvepower consumptionVSAvoidsystem responsiveness

Core Design Contradiction:

Use of energy by moving objectVSReliability

Solution Approach 1:

The system maintains a set of idle processors in a ready state that can quickly resume operation. By pre-identifying which processors should remain idle versus which can enter deeper power states, the system ensures that when tasks need to be processed, processors are already positioned to handle them with minimal wake-up delay.

Inventive Principle:

Principle #10Preliminary action

Solution Approach 2:

The system continuously monitors processor workload and uses this feedback to dynamically adjust power states. Processor bitmaps provide real-time information about which processors are active versus idle, allowing the system to optimize power state assignments based on actual workload patterns and ensure reliability through adaptive power management.

Inventive Principle:

Principle #23Feedback

Data Source

PatentUS20250278299A1Processor scheduling method and apparatus, computer device, computer-readable storage medium, and computer program product

Publication Date: 2025.09.04 TENCENT TECHNOLOGY (SHENZHEN) CO LTD

AI summary

An apparatus, computer-readable memory storing a program, and method providing processor scheduling including acquiring a total load of N processors, N being a first positive integer greater than or equal to 2; generating, based on the total load, a processor bitmap distinguishing at least one active processor and at least one idle processor among the N processors; processing, based on the processor bitmap, a to-be-processed task on the at least one active processor, and adjusting, based on the processor bitmap, the at least one idle processor to a target power-saving mode.