Processor Buffer Overflow Protection via Instruction Encryption
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
Current methods for protecting digital processors from Buffer Overflow Attacks (BOAs) are insufficient, as they rely on logical separation of memory blocks, which has reduced but not eliminated BOAs, necessitating a more reliable approach.
Innovation Solution
Incorporating a digital processor design with a Command Encryption Register (CER) and bit modification circuits that randomly and uniquely modify instruction bits before storage, using a Seed Value for encryption and decryption, and employing multiple encryption/decryption algorithms to prevent malicious code execution, ensuring chaotic behavior and processor shutdown if compromised.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If logical separation of memory blocks is used to protect processors, then security against buffer overflow attacks is improved, but protection is insufficient and attacks are not completely eliminated
Solution Approach 1:
The patent applies preliminary action by encrypting instructions before they are executed. The encryption is performed in advance using a seed value stored in the command encryption register, transforming valid instructions into encrypted form that appears as random data. This preliminary encryption prevents buffer overflow attacks by ensuring that even if malicious code is injected into memory, it cannot be executed as valid encrypted instructions without the correct seed value.
2Reliability
If instruction encryption is implemented to prevent buffer overflow attacks, then security is improved, but device complexity increases due to additional encryption/decryption circuits
Solution Approach 1:
The patent merges the encryption and decryption functions into a single integrated circuit that operates transparently to the processor. The command encryption register and associated logic are combined with the instruction fetch and decode pathways, allowing encryption/decryption to occur automatically as part of the normal instruction execution flow without requiring separate dedicated hardware blocks for each function.
Solution Approach 2:
The processor performs its own encryption and decryption operations through self-service mechanisms. The seed value stored in the command encryption register is used by the processor itself to encrypt instructions before execution and decrypt them after execution, eliminating the need for external encryption hardware or separate processing steps. The processor serves its own security needs through built-in self-encrypting/decrypting capabilities.
Data Source
AI summary
A method for changing a processor instruction randomly, covertly, and uniquely, so that the reverse process can restore it faithfully to its original form, making it virtually impossible for a malicious user to know how the bits are changed, preventing them from using a buffer overflow attack to write code with the same processor instruction changes into said processor's memory with the goal of taking control of the processor. When the changes are reversed prior to the instruction being executed, reverting the instruction back to its original value, malicious code placed in memory will be randomly altered so that when it is executed by the processor it produces chaotic, random behavior that will not allow control of the processor to be compromised, eventually producing a processing error that will cause the processor to either shut down the software process where the code exists to reload, or reset.