Processor Bus Dual Slew Rates for Speed and Signal Integrity
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Solution Overview
Problem
Modern computer systems face performance bottlenecks due to the inability of internal buses, such as the front side bus, to keep up with the increasing speeds of processing devices, as source synchronous signals are sensitive to noise and reflections, limiting data transmission rates.
Innovation Solution
Implementing a processor bus with distinct slew rates for different signal types, allowing for independent digital programming of these rates to optimize signal communication, thereby enhancing data throughput and reliability across the bus.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If source synchronous signals are transmitted at high slew rates to increase data transmission speed, then productivity improves, but signal integrity deteriorates due to increased sensitivity to noise and reflections
Solution Approach 1:
The patent applies different slew rates to different signal types on the same bus. Common clock signals use a first slew rate optimized for high-speed transmission, while source synchronous signals use a second, lower slew rate to minimize noise and reflections. This local differentiation of signal characteristics resolves the contradiction by allowing each signal type to operate at optimal performance levels without compromising overall system reliability
Solution Approach 2:
The invention changes the slew rate parameter based on signal type. By programmably selecting between different slew rate values for different signal categories, the system optimizes transmission speed for common clock signals while maintaining signal integrity for source synchronous signals, thereby resolving the trade-off between productivity and reliability
2Device complexity
If a single slew rate is used for all signals on the bus to simplify control, then device complexity is reduced, but productivity is limited due to inability to optimize transmission rates for different signal types
Solution Approach 1:
The patent implements dynamic slew rate selection where the slew rate parameter can be programmably changed based on signal type. The system transitions from a static, single slew rate approach to a dynamic, multi-rate approach that adapts to different signal requirements, thereby increasing productivity without significantly increasing control complexity through the use of programmable configuration
Data Source
AI summary
A bus for implementation with a computer system, as well as a computer processing device capable of interacting with such a bus, and a method of communicating signals over a bus, are disclosed. In at least one embodiment, the bus is a processor bus that includes a first processor bus portion that communicates first signals, and a second processor bus portion that communicates second signals at times determined independently of the first signals. The first and second signals respectively have first and second slew rates, the first and second slew rates being different from one another.