Processor Busy-Wait Idle Control in Virtual Machine Mode
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Solution Overview
Problem
The high power consumption of processors during busy-waiting states in operating systems is a challenge, as the core continues to work, leading to inefficient energy usage.
Innovation Solution
A method and device that utilize a busy-waiting instruction in virtual machine mode, generating a waiting enabling instruction, combining counting values to enter an idle state and control power consumption by stopping microcode transmission, using a counter to manage idle periods.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If the processor core continues to work during busy-waiting process, then the busy-waiting instruction can be normally performed, but the power consumption of the processor remains high
Solution Approach 1:
The patent applies dynamics by making the processor core's operational state changeable - transitioning from an active working state to an idle state during busy-waiting processes. The control device dynamically adjusts the core's state based on the busy-waiting instruction, allowing the system to adapt its power consumption level while maintaining the ability to resume work when needed.
Solution Approach 2:
The patent introduces a control device as an intermediary between the processor core and the busy-waiting instruction execution. This control device receives the busy-waiting instruction, generates a waiting enabling instruction, and controls the microcode sending process. The intermediary enables the system to enter idle state while still supporting busy-waiting functionality through the counter mechanism.
2Use of energy by moving object
If the processor enters idle state to reduce power consumption, then energy efficiency improves, but the complexity of controlling the processor state increases
Solution Approach 1:
The patent segments the processor control into distinct functional components: a control device that manages state transitions, a counter that tracks idle periods, and the processor core that executes instructions. This segmentation allows each component to have a specific, simplified function while the overall system achieves power savings. The control device handles state management separately from the core's instruction execution.
Solution Approach 2:
The patent applies preliminary action by pre-configuring the counter with an initial value before entering the idle state. The counter is set up in advance to automatically track the duration of the idle period, and the system has predetermined conditions for exiting the idle state. This preliminary setup simplifies the control logic during the actual idle period, as the system只需 wait for the counter to reach zero rather than continuously monitoring time.
3Use of energy by moving object
If microcode sending is stopped to enable idle state, then power consumption decreases, but the time to resume processing increases
Solution Approach 1:
The patent implements periodic action through the counter mechanism that periodically checks whether the idle duration has exceeded the initial value. The system enters idle state, the counter counts down from its initial value, and when the counter reaches zero, the system automatically resumes normal operation. This periodic checking mechanism ensures that the processor doesn't remain in idle state indefinitely while still allowing substantial power savings during the counting period.
Data Source
AI summary
An operation method of an electronic device is provided. A busy-waiting instruction indicating that the operating system of the processing device is in a busy-waiting state is received. The processing device is in a virtual machine mode. A microcode of the busy-waiting instruction is obtained according to the registered value of the first register. The waiting enabling instruction is generated, and the first counting value corresponding to the waiting enabling instruction and the second counting value corresponding to the first system time are obtained according to the microcode. The first and second counting values are added to generate a third counting value and store it in a second register. According to the waiting enabling instruction, a subsequent microcode is stopped sending to the processing device, so that the processing device enters an idle state, and the counter is enabled to start counting according to the third counting value.