Processor Cache Extension via Donor Ownership Transfer
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
In multi-processor computers, limited cache capacity leads to increased cache misses and performance loss due to higher latency times in accessing memory, as each processor has a dedicated point-to-point connection to memory modules, resulting in inefficient utilization of available space.
Innovation Solution
Implementing a cache extension mechanism where a donor processor detects non-use of its cache, broadcasts availability, and transfers ownership to a requesting processor through a series of messages, allowing dynamic cache extension and optimization of cache usage across processors.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Volume of stationary object
If cache capacity is limited to reduce silicon footprint, then memory module size is reduced, but cache miss rate increases leading to performance loss
Solution Approach 1:
The patent merges cache resources from multiple processors into a shared pool. When a processor experiences a cache miss, it can access cache lines from other processors' caches through inter-processor communication, effectively combining available cache capacity across the system to reduce overall cache miss rates while maintaining individual processor cache sizes.
2Speed
If each processor has dedicated point-to-point connection to memory modules, then memory access is direct, but cache utilization efficiency decreases
Solution Approach 1:
The patent makes cache memory universal by enabling any processor to access any cache in the system, not just its own dedicated cache. The cache coherence protocol allows cache lines to be shared across multiple processors, making the cache resource multi-functional and accessible to multiple processors dynamically based on demand, thereby improving utilization efficiency while maintaining fast access through existing point-to-point connections.
Data Source
AI summary
Methods, apparatuses, and computer program products of extending cache in a multi-processor computer are provided. Embodiments include detecting, by a donor processor, nonuse of a donor processor's cache; broadcasting to one or more processors in the multi-processor computer, by the donor processor, a donor-ready message indicating the donor processor's cache is available for ownership transferment; receiving from a first requesting processor, by the donor processor, a first ownership-request message requesting ownership of the donor processor's cache by the first requesting processor; transmitting to the first requesting processor, by the donor processor, an ownership-grant message indicating an intention of the donor processor to transfer ownership of the donor processor's cache to the first requesting processor; and receiving from the first requesting processor, by the donor processor, an ownership-claim message indicating that the first requesting processor intends to claim ownership of the donor processor's cache.