Processor Chip Secure Memory Segmentation for NPU Control
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Solution Overview
Problem
Current methods for controlling neural processing units (NPUs) in electronic devices face challenges such as memory overuse, delayed operation, and deterioration of content quality due to the CPU's inability to directly access original content for security reasons, leading to potential overload and difficulty in real-time execution.
Innovation Solution
A processor chip configuration with a memory having a secure and unsecure area, where a second processor transmits control signals to a third processor to access and provide address information of input content from the secure area to a first processor for neural network processing, allowing efficient neural network processing without overloading the CPU.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If the CPU directly accesses original content for NPU control, then control efficiency is improved, but content security is compromised
Solution Approach 1:
The patent introduces a secure area in memory that acts as an intermediary between the CPU and original content. The CPU can control the NPU by accessing secure area information (such as encrypted content or control parameters) without directly accessing the original content stored in the non-secure area, thus maintaining both control efficiency and content security.
2Speed
If the CPU controls the NPU at each frame unit, then real-time processing is improved, but CPU overload occurs
Solution Approach 1:
The patent extracts the NPU control function from the CPU by implementing a dedicated control module or using interrupt mechanisms. This allows the NPU to be controlled independently at each frame unit without burdening the CPU, enabling real-time processing while avoiding CPU overload.
3Adaptability or versatility
If memory is used to store both original content and control data, then data availability is improved, but memory overuse occurs
Solution Approach 1:
The patent segments memory into distinct secure and non-secure areas. The secure area stores control data and encrypted information, while the non-secure area stores original content. This segmentation allows efficient memory utilization by storing only necessary control parameters in the secure area rather than duplicating entire content, reducing overall memory usage while maintaining data availability.
Data Source
AI summary
Disclosed in a processor chip configured to perform neural network processing. The processor chip includes a memory, a first processor configured to perform neural network processing on a data stored in the memory, a second processor and a third processor, and the second processor is configured to transmit a control signal to the first processor and the third processor to cause the first processor and the third processor to perform an operation.