Processor Clock Configuration via Software Registers
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Solution Overview
Problem
Conventional network processors face limitations in clock configuration flexibility due to the limited number of external pins, which restricts the number of supported configurations and increases costs when alternative approaches like flash memory are used.
Innovation Solution
The network processor employs clock generation circuitry that determines an initial configuration from external signal lines and subsequently reconfigures based on software-updatable control registers, allowing for flexible clock settings without additional pins or complex memory.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Adaptability or versatility
If the number of external clock configuration pins is increased to support more clock configurations, then the flexibility and adaptability of clock configuration is improved, but the device complexity and manufacturing cost increase
Solution Approach 1:
The patent uses software-based control registers to store and copy clock configuration settings, replacing the need for additional physical pins. The control registers act as virtual copies of the configuration information that would otherwise require dedicated hardware pins, enabling multiple configuration options without increasing physical pin count.
Solution Approach 2:
The patent replaces the mechanical/electrical approach of using physical configuration pins with a software-based control system. Instead of configuring clocks through hardware pins, the system uses software-updatable control registers to determine clock configurations, substituting physical signaling with digital software control.
2Adaptability or versatility
If flash memory is used to store clock configuration settings, then the number of supported configurations is improved, but the manufacturing cost and device complexity increase excessively
Solution Approach 1:
The patent uses volatile memory (such as registers or buffers) to store clock configuration settings temporarily, rather than using non-volatile flash memory. This approach uses cheaper, simpler memory that can be quickly updated through software, eliminating the need for complex flash memory architecture while still supporting multiple configurations through software control.
Solution Approach 2:
The patent replaces the hardware-based flash memory storage system with a software-based configuration system. Instead of permanently storing configuration data in flash memory, the system uses software-updatable control registers, substituting persistent hardware storage with flexible software management.
3Device complexity
If the number of external clock configuration pins is limited to reduce cost and complexity, then the manufacturing cost is reduced, but the number of supported clock configurations is restricted
Solution Approach 1:
The patent makes the existing external pins serve multiple functions: they continue to provide initial configuration information while also serving as part of the software-controlled configuration system. The control registers serve as universal configuration storage that can be updated by software to support any number of configurations, making the system universally adaptable without requiring dedicated pins for each configuration option.
Solution Approach 2:
The patent transitions from a one-dimensional configuration approach (each pin representing a fixed configuration option) to a multi-dimensional approach where software control registers provide configurable parameters that can be dynamically adjusted. This dimensional shift from hardware-fixed to software-flexible configuration enables unlimited configuration options without additional pins.
Data Source
AI summary
A network processor or other type of processor includes clock generation circuitry which generates one or more clock signals for each of a number of clock domains of the processor. The clock generation circuitry comprises at least one clock generator and at least one control register subject to software-based updating. The clock generation circuitry determines a first clock configuration for the processor based on sampling one or more external clock configuration signal lines of the processor, and configures the clock generator in accordance with the first clock configuration. The clock generation circuitry subsequently determines a second clock configuration for the processor, different than the first clock configuration, based on contents of at least one control register subject to software-based updating, and reconfigures the clock generator in accordance with the second clock configuration.