Processor Common Resource Switching via Status Flag

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Solution Overview

Problem

Existing methods for isolating resources between trusted and non-trusted execution environments in processors are inefficient, particularly during switching, as they often require unnecessary storage and clearing of common resources, which can slow down interrupt handling and resource access.

Innovation Solution

A processor with a trusted and non-trusted execution environment that uses a common resource accessible to both environments, where the switching of the common resource is delayed until an instruction accessing it is executed, and a resource status flag determines the necessary switching, optimizing switching speed and reducing unnecessary operations.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If the common resource is immediately stored and cleared during execution environment switching, then resource consistency is guaranteed, but switching speed is reduced

Engineering Contradiction:
Improveresource consistencyVSAvoidswitching speed
Core Design Contradiction:
ReliabilityVSSpeed

Solution Approach 1:

The patent applies preliminary action by pre-loading the execution environment identifier into the resource status flag before actual resource access. This allows the system to prepare for potential switching needs in advance, so when switching is actually required, the common resource can be quickly loaded or cleared based on the pre-prepared flag state, thus resolving the contradiction between ensuring resource consistency and maintaining fast switching speed

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

The patent implements dynamics by making the common resource switching behavior adaptive rather than static. The resource status flag dynamically tracks whether the common resource needs to be loaded or cleared based on the current execution environment, allowing the system to flexibly adjust resource handling operations according to actual needs, thereby avoiding unnecessary operations and improving switching speed while maintaining consistency

Inventive Principle:
Principle #15Dynamics

2Reliability

If the common resource is stored and cleared during switching, then resource isolation is ensured, but interrupt handling time increases

Engineering Contradiction:
Improveresource isolationVSAvoidinterrupt handling time
Core Design Contradiction:
ReliabilityVSLoss of time

Solution Approach 1:

The patent extracts the execution environment identification information into a separate resource status flag, distinct from the common resource itself. This separation allows the system to quickly check and update environment status without necessarily performing full resource storage or clearing operations, thus ensuring resource isolation when needed while minimizing the time impact on interrupt handling

Inventive Principle:
Principle #2Taking out (Extraction)

Solution Approach 2:

The patent applies skipping by allowing the system to bypass unnecessary resource storage and clearing operations. When the resource status flag indicates that the common resource is already in the correct state for the target execution environment, the system skips the redundant load/clear operations and proceeds directly with interrupt handling, thereby reducing time loss while maintaining proper resource isolation

Inventive Principle:
Principle #21Skipping (Rushing through)

Data Source

PatentUS11442732B2Processor and instruction execution method
Publication Date: 2022.09.13 ALIBABA GROUP HOLDING LTD
  • US11442732B2 patent drawing
  • US11442732B2 patent drawing
  • US11442732B2 patent drawing

AI summary

A processor comprises a trusted execution environment and a non-trusted execution environment. The processor further comprises a common resource accessible in both the trusted execution environment and the non-trusted execution environment and an instruction processing device including circuitry configured to fetch an instruction for decoding and execute the decoded instruction. The instruction processing device includes circuitry further configured to determine consistency between a current execution environment of the processor and a resource status in response to a result from instruction decoding indicating that instruction involves access to the common resource, and load content corresponding to the current execution environment into the common resource in response to a determination that the current execution environment is inconsistent with the resource status, wherein the resource status indicates an execution environment corresponding to content in the common resource. A corresponding instruction execution method in the processor is also disclosed.