Processor Compatibility Register for Architecture Level Selection
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Solution Overview
Problem
Existing methods are inadequate for ensuring software compatibility across different processor architectures, leading to errors and limited program migration due to the need for physical availability of various processor levels for testing and the inability to execute programs on newer architectures without modification.
Innovation Solution
A processor compatibility register (PCR) is introduced, accessible only to super-privileged software, which sets the architecture level that the processor appears to support, allowing it to behave as if it conforms to the specified architecture level, enabling programs to run on multiple architecture levels without modification and facilitating seamless migration across different processor levels.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If a program is tested on physical processors of each architecture level to ensure compatibility, then software compatibility is improved, but the cost and complexity of obtaining and maintaining multiple processor samples becomes excessively burdensome
Solution Approach 1:
The patent creates a virtual copy of the processor architecture through a software layer that simulates different architecture levels. Instead of requiring physical processor samples for each architecture level, the system uses a virtualization mechanism that replicates the behavioral characteristics of processors conforming to various architecture levels, allowing comprehensive compatibility testing on a single physical platform.
Solution Approach 2:
The patent introduces a software intermediary layer between the program and the physical processor that mediates the interaction. This intermediary translates and adapts instructions to match the target architecture level, enabling programs to be tested and executed against virtual representations of different processor architectures without requiring actual hardware samples of each level.
2Reliability
If programs are modified to work on newer architecture levels, then execution correctness on new processors is improved, but the cost of modification and redistribution becomes prohibitively expensive
Solution Approach 1:
The patent implements a dynamic architecture level specification mechanism that allows the processor to adapt its behavior based on the target architecture level indicated in the program's metadata. Instead of statically modifying programs for each architecture level, the system dynamically configures the execution environment to match the intended target architecture, enabling correct execution on newer processors without program modification.
Solution Approach 2:
The patent changes the architecture level parameter at runtime through a compatibility register that can be set by super-privileged software. This allows the same program to be executed on different virtual architecture levels by simply changing the parameter setting, eliminating the need for costly program modifications and redistribution for each architecture level.
3Reliability
If processor migration is restricted to processors conforming to the same architecture level, then program execution correctness is ensured, but the versatility and flexibility of program migration is limited
Solution Approach 1:
The patent enables dynamic architecture level specification during migration by allowing the target architecture level to be configured through a compatibility register. This dynamic configuration allows programs to migrate to processors conforming to different architecture levels while maintaining execution correctness, as the target processor can be configured to match the program's intended architecture level rather than requiring exact hardware matching.
4Productivity
If newer processor architecture levels are used, then processing capability is improved, but the risk of errors from latent bugs in programs increases
Solution Approach 1:
The patent performs preliminary compatibility verification by checking the target architecture level against the program's intended architecture level before execution. The compatibility register is configured in advance to match the program's target architecture, and super-privileged software verifies this matching beforehand. This preliminary action prevents programs with latent bugs from executing on incompatible newer processor levels, thereby reducing error occurrence while preserving the ability to use advanced processing capabilities.
Data Source
AI summary
A method and system for selecting the architecture level to which a processor appears to conform within a computing environment when executing specific logical partitions or programs and performing migration among different levels of processor architecture. The method utilizes a “processor compatibility register” (PCR) that controls the level of the architecture that the processor appears to support. In one embodiment, the PCR is accessible only to super-privileged software. The super-privileged software sets bits in the PCR that specify the architecture level that the processor is to appear to support so that when the program runs on the processor, the processor behaves in accordance with the architecture level for which the program was designed.