Dynamic Reconfigurable Processor Configuration Method
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Solution Overview
Problem
Dynamic reconfigurable processors face issues with increased configuration time and memory capacity, power consumption due to frequent configuration changes, and the need to reconfigure the entire array when switching one processing unit's function.
Innovation Solution
A method and device for generating configuration information that allows only necessary processing units to be configured, with independent configuration information for each unit, reducing repeat configurations and improving flexibility through partial and selective configuration, using a modulo scheduling algorithm to optimize configuration information generation.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Adaptability or versatility
If dynamic switching of circuit functions is implemented, then flexibility and adaptability are improved, but configuration time and memory capacity increase
Solution Approach 1:
The configuration information is segmented into two parts: a shared array configuration information top that applies to the entire processing unit array, and individual processing unit configuration information for each unit. This segmentation allows the shared common configuration to be stored once while enabling individual units to have their own specific configurations, reducing overall configuration time and memory capacity while maintaining the ability to dynamically switch circuit functions.
Solution Approach 2:
Instead of configuring the entire processing unit array when a single unit needs configuration change, the system implements partial configuration by only updating the specific processing unit's configuration information. This partial action approach significantly reduces configuration time and memory access operations while maintaining the flexibility to switch circuit functions dynamically.
2Adaptability or versatility
If dynamic switching of circuit functions is implemented, then flexibility is improved, but configuration power consumption increases
Solution Approach 1:
The configuration system is segmented into shared array-level configuration and individual unit-level configuration. By storing the shared array configuration information top separately and only updating individual unit configurations when needed, the system reduces the frequency of memory access operations, thereby reducing configuration power consumption while maintaining dynamic switching capability.
Solution Approach 2:
The system performs partial configuration updates only for specific processing units that require function changes, rather than updating the entire array configuration. This partial action reduces the number of memory write operations and associated power consumption while maintaining the ability to dynamically switch circuit functions.
3Adaptability or versatility
If one processing unit's function is changed, then adaptability is improved, but the entire array must be reconfigured causing loss of time
Solution Approach 1:
The configuration information is divided into a shared array configuration information top and individual processing unit configuration information. This segmentation enables independent configuration of single processing units without affecting others, allowing function changes in one unit while maintaining the original configurations of other units, thus eliminating the need for full array reconfiguration.
Solution Approach 2:
The system implements selective configuration by only updating the configuration of the specific processing unit that requires function changes, rather than reconfiguring the entire array. This partial configuration approach significantly reduces reconfiguration time and allows other processing units to continue operating with their existing configurations.
Data Source
AI summary
Provided is a method for generating configuration information of a dynamic reconfigurable processor. The dynamic reconfigurable processor includes a processing unit array, and the processing unit array includes a plurality of processing units. The method includes steps of: reading information of a task to be executed and generating an array configuration information top of the processing unit array according to the information; generating a plurality of processing unit configuration information corresponding to the plurality of processing units respectively according to the information; and assembling the array configuration information top and the plurality of processing unit configuration information.


