Processor Core Clustering for Voltage-Frequency Optimization
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Solution Overview
Problem
Server processors with multiple cores face significant power losses due to a single voltage-frequency (V-F) representation for all cores, as power loss is proportional to V^2, leading to inefficient operation and increased energy consumption.
Innovation Solution
The approach involves formulating multiple VID representations for clusters of cores, where each representation is derived from the composite characteristic of a group of cores, allowing each core to operate at its own minimum cache voltage (Vccmin) at low frequencies, reducing overall core voltage and minimizing power losses.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Device complexity
If a single VID representation is used for all cores, then device complexity is reduced, but power loss increases significantly
Solution Approach 1:
The patent divides the processor cores into multiple clusters, where each cluster is assigned a separate VID representation. This segmentation allows different voltage-frequency characteristics to be applied to different groups of cores, reducing overall power loss while avoiding the complexity of having a unique VID for every single core. The clustering approach strikes an optimal balance between management complexity and power efficiency.
Solution Approach 2:
The patent applies the local quality principle by allowing different clusters of cores to have different VID representations tailored to their specific voltage-frequency characteristics. This enables each cluster to operate at optimized voltage levels for its workload, rather than forcing all cores to use a single conservative VID that would cause excessive power consumption in many-core processors.
2Loss of energy
If a unique VID table is created for each core, then power efficiency is optimized, but storage requirements and access latency increase
Solution Approach 1:
The patent merges the VID representations by assigning the same VID table to multiple cores within a cluster. This combining approach reduces the total number of VID tables that need to be stored in memory, thereby reducing storage requirements and access latency, while still maintaining optimized power efficiency through cluster-specific VID assignments.
Solution Approach 2:
The patent makes each VID representation universal by applying it to multiple cores within a cluster. A single VID table serves multiple cores simultaneously, reducing the overall number of VID representations needed while maintaining the ability to optimize power consumption for different core groups based on their voltage-frequency characteristics.
Data Source
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AI summary
In an embodiment, a processor includes a plurality of cores grouped into a plurality of clusters. The clusters are formed based on a corresponding operating voltage of each core at each of a plurality of frequencies. Each cluster includes a unique set of cores and at least one cluster includes at least two of the cores. The processor also includes a power control unit (PCU) including frequency/voltage control logic, responsive to a frequency change request for a first core of a first cluster, to determine an operating voltage for the first core from a first cluster voltage-frequency (V-F) table associated with the first cluster. The first cluster V-F table uniquely specifies a corresponding operating voltage at each of a plurality of frequencies of operation of the cores of the first cluster. Other embodiments are described and claimed.