Processor Core Frequency Boosting for Initial Network Throughput
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Solution Overview
Problem
In high-speed, low-latency communication environments like 5G networks, electronic devices face latency issues due to suboptimal initial data processing rates, leading to network congestion and inefficient use of available bandwidth.
Innovation Solution
The solution involves preemptively boosting the frequency of processor cores to a designated level when data reception begins, based on analysis of network type, state, and traffic patterns, to enhance initial throughput.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Use of energy by moving object
If the processor operates at low frequency to reduce current consumption during standby or low usage, then energy efficiency is improved, but initial data processing speed deteriorates
Solution Approach 1:
The patent applies preliminary action by boosting the processor frequency to a designated high value before actual data reception begins. The processor frequency is configured to a first value (high frequency) in advance when a data reception event is predicted, ensuring the processor is ready to handle incoming data at maximum speed. After data reception completes, the frequency is reduced to a second value (low frequency) to conserve energy. This pre-positioning of high performance eliminates the startup latency that would otherwise occur.
2Loss of energy
If the processor maintains low processing rate to conserve energy, then power efficiency is improved, but network latency increases due to perceived congestion
Solution Approach 1:
The system performs preliminary action by anticipating data reception events and proactively boosting the processor frequency before actual data arrives. This prevents the processor from appearing congested or slow, eliminating latency issues that would arise from cold-start processing. The frequency is maintained at a high first value during the anticipated reception period, then reduced to a low second value afterward, optimizing both responsiveness and energy efficiency.
Solution Approach 2:
The patent implements feedback by monitoring data reception events and dynamically adjusting processor frequency based on actual network conditions. When data reception is detected or anticipated, the system feedback-triggered frequency boost activates, raising the processor speed to handle the incoming data stream. This closed-loop approach ensures the processor performance matches actual network throughput requirements, preventing both wasted energy and unnecessary latency.
3Productivity
If the processor frequency is increased to maximize data transmission rate, then throughput is improved, but energy consumption increases
Solution Approach 1:
The patent applies periodic action by cyclically switching the processor frequency between a high first value and a low second value based on data reception phases. During data reception periods, the frequency is maintained at the high first value to maximize throughput. Between reception events, the frequency drops to the low second value to conserve energy. This periodic switching pattern optimizes the balance between productivity and energy consumption, avoiding sustained high-power operation.
Solution Approach 2:
The system implements dynamics by making the processor frequency adjustable and adaptive rather than fixed. The frequency dynamically transitions between a first value (high frequency for maximum throughput) and a second value (low frequency for energy saving) based on real-time data reception conditions. This dynamic adaptation allows the processor to match its performance level to actual workload requirements, optimizing both speed and energy efficiency throughout operation.
Data Source
AI summary
A device and method for improving data transmission and reception throughput in an electronic device are provided. The electronic device includes a communication circuit for communication with a designated network, a processor including a multi-core, and a memory. The memory may store instructions that, when executed, cause the processor to detect a new data flow on the basis of the communication circuit, identify the type of the network connected via the communication circuit, identify, on the basis of a policy related to the identified network, a boosting start condition for the new data flow, and when boosting for the new data flow starts, set the frequency of a core, which processes a packet related to the new data flow, to a designated frequency.