Autonomous Processor Core Testing via Power Management Agent
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Solution Overview
Problem
Current processor testing methods, such as software-based solutions and Scan-At-Field (SAF) techniques, are inefficient and can crash systems or fail to detect defects effectively, particularly due to their reliance on external test circuitry, long execution times, and limited coverage of hardware faults like stuck-at and at-speed defects.
Innovation Solution
The implementation of Structural Based Functional Testing (SBFT) within the processor, which allows for autonomous, isolated, and at-speed testing using a power management agent to control voltage/frequency work-points and generate a scan out signature for defect detection, enabling efficient detection and isolation of defective cores without disrupting system operation.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If software-based testing solutions are used, then system operation can be maintained during testing, but testing efficiency is reduced and system crashes may still occur
Solution Approach 1:
The processor core performs self-testing through autonomous execution of functional test content, eliminating the need for external test circuitry. The core isolates itself and executes tests independently, achieving both system continuity and improved testing efficiency through self-service mechanisms
Solution Approach 2:
A power management agent circuit serves as an intermediary between the processor core and external systems. It manages the core's isolation state, controls voltage/frequency work-points during testing, and handles test result reporting, enabling efficient testing while maintaining system operation through coordinated mediation
2Measurement precision
If Scan-At-Field techniques are used, then external test circuitry can be utilized, but testing time increases and defect detection coverage is limited
Solution Approach 1:
The patent replaces mechanical/external test circuitry with software-based functional test content that executes directly on the processor core. This substitution enables comprehensive defect detection including stuck-at and at-speed defects while reducing testing time through autonomous execution without external hardware dependencies
Solution Approach 2:
The power management agent dynamically changes voltage and frequency parameters during testing by controlling work-points. This allows the core to execute tests at optimal speeds for defect detection, improving both detection coverage and execution efficiency through parameter optimization
3Measurement precision
If autonomous functional testing is implemented, then testing coverage for stuck-at and at-speed defects is improved, but device complexity increases
Solution Approach 1:
The power management agent circuit performs multiple functions: it manages core isolation, controls voltage/frequency work-points, monitors testing progress, and reports results. This multi-functionality reduces the need for separate dedicated test circuits, achieving improved defect detection coverage without proportionally increasing device complexity
Solution Approach 2:
The functional test content is segmented into discrete instructions that can be executed independently by the processor core. This segmentation allows comprehensive defect detection through multiple test cases while maintaining manageable complexity through modular test structure
Data Source
AI summary
Systems, methods, and apparatuses for autonomous functional testing of a processor are described. In one example, a processor includes a plurality of processor cores that are each coupled to a respective power management agent circuit; a cache shared by the plurality of processor cores; and a control register, that when set, causes: a save of a state of a first processor core of the plurality of processor cores to storage, a transfer of control of the first processor core to a power management agent circuit of the first processor core, isolation of the first processor core from the other of the plurality of processor cores by the power management agent circuit, performance of one or more functional tests from the cache on the first processor core caused by the power management agent circuit to generate a test result, removal of the isolation of the first processor core from the other of the plurality of processor cores by the power management agent circuit, and a transfer of the control by the power management agent circuit back to the first processor core.