Processor Cryptographic Unit DES Instruction Support
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Solution Overview
Problem
As electronic commerce and communication increase, existing cryptographic algorithms become vulnerable to attacks due to advancements in computer technology, leading to performance overhead in secure transactions, and more complex algorithms are needed to counter new threats.
Innovation Solution
A processor with instruction support for implementing the Advanced Encryption Standard (AES) and Data Encryption Standard (DES) block cipher algorithms, including a cryptographic unit that generates expanded cipher keys and performs specific operations compliant with Federal Information Processing Standards, to enhance cryptographic performance and security.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If more sophisticated cryptographic algorithms are used to counter new threats, then security is improved, but computational complexity increases and performance overhead increases
Solution Approach 1:
The patent replaces general-purpose processor instructions with specialized cryptographic instructions that are natively supported by the processor architecture. This substitution of mechanical computation with dedicated hardware support reduces computational complexity while maintaining security.
Solution Approach 2:
The patent changes the parameter of instruction execution by providing direct hardware support for cryptographic operations through specialized instructions. This reduces the number of computational steps required and improves performance without compromising security.
2Reliability
If more sophisticated cryptographic algorithms are used to counter new threats, then security is improved, but transaction performance decreases
Solution Approach 1:
The patent substitutes general computational mechanisms with specialized cryptographic instruction support built into the processor. This hardware-level support accelerates cryptographic operations and improves transaction performance while maintaining security requirements.
Solution Approach 2:
The patent provides preliminary action by pre-configuring the processor with native support for cryptographic instructions. This preparation allows cryptographic operations to execute efficiently without runtime overhead, improving transaction performance.
3Device complexity
If cryptographic operations are implemented using general processor instructions, then device complexity is reduced, but execution speed decreases
Solution Approach 1:
The patent replaces software-based cryptographic implementation with hardware-based instruction support. This substitution provides native processor support for cryptographic operations, significantly improving execution speed while maintaining implementation simplicity through standardized instructions.
Data Source
AI summary
A processor including instruction support for implementing the Data Encryption Standard (DES) block cipher algorithm may issue, for execution, programmer-selectable instructions from a defined instruction set architecture (ISA). The processor may include a cryptographic unit that may receive instructions for execution. The instructions include one or more DES instructions defined within the ISA. In addition, the DES instructions may be executable by the cryptographic unit to implement portions of an DES cipher that is compliant with Federal Information Processing Standards Publication 46-3 (FIPS 46-3). In response to receiving a DES key expansion instruction defined within the ISA, the cryptographic unit may generate one or more expanded cipher keys of the DES cipher key schedule from an input key.