Processor Data Gathering via Pre-sorted Memory Access

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Solution Overview

Problem

The processing time and efficiency decrease when gather or scatter instructions are used for vector operations due to the need for increased memory access, as only continuous memory areas can be accessed in one operation, leading to discontinuous memory access for data values.

Innovation Solution

A processor that loads or stores data elements by changing the storage order, allowing for efficient data gathering and storage by reading and writing data elements from adjacent memory areas collectively and sorting them into corresponding storage units, reducing the need for individual memory accesses.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Adaptability or versatility

If gather or scatter instructions are used for vector operations, then data can be accessed from designated indices of a data array, but the number of memory accesses increases and processing time increases

Engineering Contradiction:
Improvedata access flexibilityVSAvoidprocessing time
Core Design Contradiction:
Adaptability or versatilityVSLoss of time

Solution Approach 1:

The patent applies preliminary action by pre-organizing data in the memory into continuous areas corresponding to vector operation units before the vector operation is executed. This preprocessing step groups data elements that will be accessed together during the gather operation, so that when the gather instruction is executed, all required data elements can be fetched in a single continuous memory access operation rather than requiring multiple separate accesses for discontinuous data locations.

Inventive Principle:
Principle #10Preliminary action

2Adaptability or versatility

If gather or scatter instructions are used for vector operations, then data can be accessed from designated indices of a data array, but the number of memory accesses increases

Engineering Contradiction:
Improvedata access flexibilityVSAvoidprocessing efficiency
Core Design Contradiction:
Adaptability or versatilityVSProductivity

Solution Approach 1:

The patent applies preliminary action by pre-organizing data in the memory into continuous areas corresponding to vector operation units before the vector operation is executed. This preprocessing step groups data elements that will be accessed together during the gather operation, so that when the gather instruction is executed, all required data elements can be fetched in a single continuous memory access operation rather than requiring multiple separate accesses for discontinuous data locations.

Inventive Principle:
Principle #10Preliminary action

3Adaptability or versatility

If data is stored in discontinuous memory areas, then data values can be stored at designated indices, but memory access must be performed in respective clusters of continuous areas

Engineering Contradiction:
Improvedata storage flexibilityVSAvoidmemory access complexity
Core Design Contradiction:
Adaptability or versatilityVSDevice complexity

Solution Approach 1:

The patent applies the inversion principle by reversing the conventional approach: instead of having data scattered in discontinuous memory areas and requiring complex clustered access patterns, the patent inverts the storage organization so that data is pre-arranged in continuous memory areas that correspond to the vector operation units. This inversion simplifies the memory access pattern from complex clustered access to simple sequential access, while still supporting the same data indexing functionality.

Inventive Principle:
Principle #13The other way round (Inversion)

Data Source

PatentUS10235398B2Processor and data gathering method
Publication Date: 2019.03.19 RENESAS ELECTRONICS CORP
  • US10235398B2 patent drawing
  • US10235398B2 patent drawing
  • US10235398B2 patent drawing

AI summary

An object of the present invention is to efficiently perform a data load process or a data store process between a memory and a storage unit in a processor. The processor includes: a plurality of storage units associated with a plurality of data elements included in a data set; and a control unit that reads the plurality of data elements stored in adjacent storage areas from a memory, in which a plurality of the data sets is stored, collectively for respective data sets, sorts the respective read data elements to a storage unit corresponding to the data element among the plurality of storage units, and writes the data elements to the respective data sets.