Processor Data Re-Access Using Local Storage to Reduce Memory Fetches
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Solution Overview
Problem
Existing data processing techniques, such as neural network and graphics processing, face inefficiencies in handling large amounts of data, leading to high power consumption and bandwidth usage due to frequent memory fetches.
Innovation Solution
A processor with storage and execution circuitry, equipped with a handling unit that allocates storage elements efficiently based on logical locations and generates execution instructions to update data in a predefined order, reducing the need for memory fetches by reusing input data within the storage.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Use of energy by moving object
If data is processed using conventional memory fetch methods, then data processing can be performed, but power consumption and bandwidth usage increase due to frequent memory fetches
Solution Approach 1:
The patent applies preliminary action by pre-allocating storage elements and organizing data in a manner that enables efficient reuse. The handling unit allocates storage elements before data processing operations, and input data is kept readily accessible in allocated storage, eliminating the need for frequent memory fetches during subsequent processing operations.
Solution Approach 2:
The patent introduces an intermediary mechanism through the handling unit that manages storage allocation and data organization. This handling unit acts as a mediator between the execution circuitry and memory system, optimizing data access patterns and reducing direct memory fetches by maintaining data in allocated storage elements.
2Quantity of substance
If frequent memory fetches are performed for data processing, then data can be accessed, but bandwidth requirements increase
Solution Approach 1:
Storage elements are allocated in advance before data processing operations begin. This preliminary allocation ensures that data resides in readily accessible storage locations throughout the processing pipeline, eliminating the need for repeated bandwidth-consuming memory fetches during execution.
Solution Approach 2:
The system implements self-service through the handling unit that automatically manages storage allocation and data organization. Once data is loaded into allocated storage elements, the processing circuitry can independently access and reuse the data without requiring additional memory bandwidth for fetch operations.
3Productivity
If storage elements are allocated efficiently based on logical locations, then data processing efficiency improves, but device complexity increases
Solution Approach 1:
The patent applies segmentation by dividing storage into discrete allocable elements that can be independently managed. The handling unit segments the storage resource into individual storage elements that can be allocated to specific operations, enabling efficient data organization and access while maintaining manageable complexity through modular storage management.
Data Source
AI summary
A processor comprising storage, execution circuitry and a handling unit configured to generate execution instructions to instruct the execution circuitry to execute a sub-operation to generate output data. The execution instructions comprise location data for prior data generated during execution of a prior sub-operation. The execution instructions instruct the execution circuitry to use the output data to update data stored within respective storage elements of a plurality of storage elements according to a predefined order, starting from an initial storage element determined based on the location data, so as to update the prior data using the output data. Further examples relate to a handling unit configured to generate execution instructions, comprising input location data, to instruct execution circuitry to re-read at least part of input data starting from an initial input storage element determined based on the input location data.