Processor Data Sharing via Message Queues Without Shared Memory
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Solution Overview
Problem
Existing computer systems require shared memory for processor communication, leading to data copying, synchronization issues, and processor task blocking during data transfer, which hinders low consumption modes.
Innovation Solution
A computer system utilizing a transmission module, such as a direct memory access controller, to transfer data between processors without shared memory, allowing each processor to define its own memory area and enabling concurrent task execution during data transfer.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If shared memory is used for data exchange between processors, then data can be exchanged between processors, but data copying is required and processors must be synchronized
Solution Approach 1:
The patent extracts the shared memory requirement from the data exchange mechanism. Instead of using shared memory, the system uses separate memory spaces for each processor with a message queue mechanism that eliminates the need for memory sharing, copying, and synchronization
Solution Approach 2:
The patent introduces a message queue as an intermediary between processors. The message queue acts as a buffer that receives messages from the sending processor and delivers them to the receiving processor, eliminating direct memory sharing and synchronization requirements
2Reliability
If processors directly control data transfer, then data can be transferred between processors, but processors cannot perform other tasks during transfer
Solution Approach 1:
The patent implements self-service data transfer through message queues. The message queue automatically manages data transfer between processors without requiring processor intervention during the transfer process, allowing processors to perform other tasks simultaneously
Solution Approach 2:
The message queue serves as an intermediary that autonomously handles data transfer. Once the sending processor places data in the message queue, the queue independently manages the transfer to the receiving processor, freeing both processors to execute other tasks
3Reliability
If interrupts are used for synchronization during data transfer, then data can be synchronized between processors, but processors cannot enter low consumption mode
Solution Approach 1:
The patent extracts the interrupt mechanism from the data transfer process. By using message queues for automatic transfer management, the system eliminates the need for interrupts, allowing processors to enter low consumption modes while maintaining data synchronization reliability
Data Source
AI summary
According to one aspect, a computer system is proposed comprising: a first processor, known as sender processor, and a second processor, known as destination processor, a first memory, known as source memory, associated with the sender processor, and a second memory, known as destination memory, associated with the destination processor, the source memory being configured to store data that may be intended for the destination processor, a transmission module controlled by the sender processor and by the destination processor, the transmission module being configured to transfer a message comprising data intended for the destination processor from the source memory towards the destination memory.