Data Processor Exception Handling for Debugging

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Solution Overview

Problem

In data processor applications, reset events are treated as highest-priority exceptions, causing the processor to abort application instructions without saving state information, making it difficult to evaluate the events leading up to the error.

Innovation Solution

A data processor device and method that halt exception processing to facilitate debugging, allowing for selective treatment of exception events as either interrupt or reset events, enabling the preservation or invalidation of state information to aid in debugging and error analysis.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If reset events are treated as highest-priority exceptions causing processor to abort application instructions, then processor reliability is improved, but loss of information occurs because state information is not saved

Engineering Contradiction:
Improveprocessor reliabilityVSAvoidstate information loss
Core Design Contradiction:
ReliabilityVSLoss of information

Solution Approach 1:

The patent applies preliminary action by saving state information before the processor aborts application instructions during a reset event. The system proactively captures and stores the current execution state (register values, program counter, etc.) before the reset occurs, enabling later analysis of what led up to the error without compromising the immediate reliability response.

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

The patent introduces an intermediary mechanism (exception handling unit or debug module) that mediates between the reset event and the processor core. This intermediary captures state information and stores it in a separate location, allowing the reset to proceed for reliability while preserving the information needed for subsequent error analysis.

Inventive Principle:
Principle #24Intermediary (Mediator)

2Ease of operation

If exception processing is halted to facilitate debugging, then ease of operation is improved, but productivity deteriorates due to interruption of normal processing

Engineering Contradiction:
Improvedebugging easeVSAvoidprocessing productivity
Core Design Contradiction:
Ease of operationVSProductivity

Solution Approach 1:

The patent segments the exception processing into distinct phases: state capture, debugging analysis, and resumption. By separating the debugging functions from the normal processing flow and providing controlled entry/exit points, the system enables detailed examination when needed while minimizing disruption to overall productivity through structured resumption capabilities.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The patent implements dynamic exception handling where the processor can transition between normal operation and debugging modes based on exception conditions. The system dynamically adjusts its behavior by halting exception processing only when debugging is required and automatically resuming when debugging is complete, optimizing both ease of operation and productivity based on operational context.

Inventive Principle:
Principle #15Dynamics

Data Source

PatentUS10073797B2Data processor device supporting selectable exceptions and method thereof
Publication Date: 2018.09.11 NXP USA INC
  • US10073797B2 patent drawing
  • US10073797B2 patent drawing
  • US10073797B2 patent drawing

AI summary

A processor begins exception processing in response to an exception event. Exception processing by the processor is halted during exception processing to facilitate debugging. The exception event can be a reset exception event or an interrupt exception event. Normal exception processing by the data processor can be resumed after debugging, or exception processing by the data processor can be aborted to allow the normal execution of instructions by the data processor to resume. An exception event can be selectively treated as an interrupt or a reset.