Processor Debug Instruction Register for Silicon Footprint Reduction

Resolve Bottlenecks,
Find Innovative SolutionsGenerate Solutions

Solution Overview

Problem

Existing debugging mechanisms for processors are wasteful in terms of silicon footprint due to on-chip debug ROMs, and alternatives such as external debug ROMs require bespoke adapters or consume valuable program memory, while conventional adapters cannot inject code into the pipeline.

Innovation Solution

A processor design that eliminates the need for an on-chip debug ROM by using a debug instruction register accessible via a conventional debug adapter, allowing the adapter to write machine code instructions directly into the execution pipeline, thereby minimizing additional hardware and preserving program memory.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If an on-chip debug ROM is used to store debug instructions, then the processor can execute debug code, but the silicon footprint increases

Engineering Contradiction:

Improvedebugging capabilityVSAvoidsilicon footprint

Core Design Contradiction:

ReliabilityVSArea of stationary object

Solution Approach 1:

The patent extracts the debug ROM from the processor chip and relocates it to an external memory device. The processor includes a debug mode switching logic that can switch between fetching instructions from the program memory (normal mode) or from the external debug ROM (debug mode). This extraction eliminates the need for on-chip debug ROM, reducing silicon footprint while maintaining debugging capability.

Inventive Principle:

Principle #2Taking out (Extraction)

Solution Approach 2:

The patent introduces a memory interface as an intermediary component that mediates between the processor and the external debug ROM. The memory interface handles the communication and data transfer between the processor's instruction fetch unit and the external memory, enabling the processor to fetch debug instructions from external storage without direct physical connection requirements.

Inventive Principle:

Principle #24Intermediary (Mediator)

2Area of stationary object

If an external debug ROM is used, then silicon footprint is reduced, but a bespoke debug adapter is required

Engineering Contradiction:

Improvesilicon footprintVSAvoidadapter requirements

Core Design Contradiction:

Area of stationary objectVSDevice complexity

Solution Approach 1:

The patent makes the external debug ROM accessible through the existing debug interface and debug adapter that are already part of the processor's debugging architecture. The debug adapter can write debug instructions to the external debug ROM through the debug interface, and the processor can fetch these instructions when in debug mode. This universal approach allows existing debug adapters to work with external debug ROM without requiring bespoke custom adapters.

Inventive Principle:

Principle #6Universality (Multi-functionality)

3Device complexity

If program memory is used to store debug code, then no additional hardware is needed, but valuable program memory is consumed

Engineering Contradiction:

Improvehardware overheadVSAvoidprogram memory usage

Core Design Contradiction:

Device complexityVSQuantity of substance

Solution Approach 1:

The patent extracts debug code storage from the program memory and relocates it to an external debug ROM. The processor includes switching logic that can select between fetching instructions from program memory (for normal execution) or from external debug ROM (for debugging). This extraction preserves program memory for application code while maintaining the ability to execute debug instructions from external storage.

Inventive Principle:

Principle #2Taking out (Extraction)

4Adaptability or versatility

If conventional debug adapters are used, then adapter compatibility is maintained, but code injection into the pipeline is not possible

Engineering Contradiction:

Improveadapter compatibilityVSAvoidcode injection capability

Core Design Contradiction:

Adaptability or versatilityVSEase of operation

Solution Approach 1:

The patent introduces a debug mode switching mechanism that dynamically changes the instruction fetch behavior based on the current operating mode. When in debug mode, the processor fetches instructions from the external debug ROM instead of program memory. This dynamic switching enables conventional debug adapters to inject code into the execution pipeline by writing to the external debug ROM, while maintaining compatibility with standard debug interfaces and adapters.

Inventive Principle:

Principle #15Dynamics

Data Source

PatentUS11775415B2Debugging instruction register to receive and input debugging instructions to a processor for a thread of execution in a debug mode

Publication Date: 2023.10.03 GRAPHCORE LTD

AI summary

A processor comprising at least one processing module, each processing module comprising: an execution pipeline; memory; an instruction fetch unit comprising operable to switch between an operational mode and a debugging mode, the instruction fetch unit being configured so as, when in the operational mode, to fetch machine code instructions from the memory into the execution pipeline to be executed; and a debug interface for connecting to a debug adapter. The debug interface comprises a debug instruction register enabling the debug adapter to write a machine code instruction to the debug instruction register, and wherein the instruction fetch unit is configured so as, when in the debug mode, to fetch instructions from the debug instruction register into the pipeline instead of from the memory.