Processor Dispatch Algorithm Power Management

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Solution Overview

Problem

Current multi-processor computing systems fail to optimize power-performance efficiency, as dispatching algorithms do not take advantage of performance differences between processors, leading to suboptimal throughput per Watt, especially when executing binary compatible application code across multiple cores.

Innovation Solution

Implementing a dispatching algorithm that dynamically adjusts task distribution across processors with varying power-performance characteristics, using a hypervisor or operating system to manage power states and optimize power usage by leveraging high-performance cores only when necessary, and powering off high-powered cores when not required to meet service-level agreements.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Productivity

If high-performance processor cores are used to increase system throughput, then processing speed and performance are improved, but power consumption increases

Engineering Contradiction:
Improvesystem throughputVSAvoidpower consumption
Core Design Contradiction:
ProductivityVSUse of energy by moving object

Solution Approach 1:

The system dynamically adjusts processor core power states based on workload requirements. The hypervisor monitors task dispatch needs and transitions cores between active and powered-off states in real-time, allowing the system to adapt power consumption to actual performance needs rather than operating at fixed high-power states

Inventive Principle:
Principle #15Dynamics

Solution Approach 2:

The invention changes the power state parameter of processor cores from a static high-power configuration to a dynamic state that can switch between high-performance mode and low-power mode. By modifying the power state parameter based on service-level agreement requirements and workload characteristics, the system achieves optimal balance between throughput and power consumption

Inventive Principle:
Principle #35Parameter changes

2Productivity

If processor performance is increased to meet customer expectations, then system capability is improved, but additional power is required

Engineering Contradiction:
Improveprocessor performanceVSAvoidpower consumption
Core Design Contradiction:
ProductivityVSUse of energy by stationary object

Solution Approach 1:

Instead of keeping all high-performance cores continuously active, the system applies partial action by activating only the number of high-performance cores necessary to meet service-level agreements. When fewer cores are needed, excess cores are powered down, avoiding unnecessary power consumption while maintaining required performance levels

Inventive Principle:
Principle #16Partial or excessive action

3Productivity

If all processor cores are kept active to maximize throughput, then system performance is improved, but power consumption increases and service-level agreements may not be optimized

Engineering Contradiction:
Improvesystem throughputVSAvoidpower waste
Core Design Contradiction:
ProductivityVSLoss of energy

Solution Approach 1:

The hypervisor implements a feedback mechanism that continuously monitors system workload, task dispatch requirements, and service-level agreement compliance. Based on this feedback, the system adjusts the power state of processor cores dynamically, transitioning cores to powered-off state when not needed and activating them when required, thereby eliminating power waste while maintaining throughput

Inventive Principle:
Principle #23Feedback

Data Source

PatentEP2430541B1Power management in a multi-processor computer system
Publication Date: 2018.07.04 INTERNATIONAL BUSINESS MACHINE CORPORATION
  • EP2430541B1 patent drawingFigure 1
  • EP2430541B1 patent drawingFigure 2
  • EP2430541B1 patent drawingFigure 3

AI summary

Power management in a multi-processor computer system, including a computer program product for facilitating receiving a task for execution in a high power state, and determining a current power state of a processor in a multi-processor system, the system having a specified power limit. The task is dispatched to the processor if the current power state of the processor is the high power state. If the processor is not in the high power state, then it is determined if moving the processor into the high power state will cause the multi-processor system to exceed the specified power limit. The processor is moved into the high power state in response to determining that moving the processor into the high power state will not cause the multi-processor system to exceed the specified power limit. The task is dispatched to the processor in response to moving the processor into the high power state.