Processor Dynamic Front End Allocation for Thread Divergence
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Solution Overview
Problem
Current processors face inefficiencies in handling conditional branches due to thread divergence, particularly in SIMD mode, which requires sequential execution and increases processor complexity, while MIMD mode complicates hardware design and increases costs due to the need for multiple front end units.
Innovation Solution
A processor with a dynamic mode-switching capability between SIMD and MIMD, where a controller determines thread divergence and allocates processing elements to active front end units, allowing for dynamic activation and deactivation of front end units to optimize resource usage and parallelism.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Device complexity
If a processor uses SIMD structure with a single front end unit, then hardware resource requirements are reduced and parallel data processing performance is increased, but thread divergence causes sequential execution that hampers efficient resource use
Solution Approach 1:
The processor dynamically switches between SIMD and MIMD execution modes based on thread divergence detection. When thread divergence is detected, the system transitions from SIMD to MIMD mode, allowing different processing elements to execute different instructions simultaneously, thereby resolving the contradiction between hardware simplicity and resource utilization efficiency
Solution Approach 2:
The system changes the execution mode parameter from fixed SIMD to variable mode (SIMD/MIMD) based on runtime conditions. By detecting thread divergence and adjusting the execution mode accordingly, the processor optimizes both hardware resource usage and processing efficiency for different workload scenarios
2Productivity
If a processor uses MIMD structure with multiple front end units, then thread divergence is handled efficiently and processing speed is improved, but hardware design becomes complicated and processor size increases manufacturing cost
Solution Approach 1:
Instead of permanently configuring multiple front end units, the system dynamically activates additional front end units only when thread divergence is detected. This dynamic approach allows the processor to achieve MIMD-level performance when needed while maintaining simpler hardware design and lower manufacturing costs for the baseline configuration
Solution Approach 2:
The processor front end units are designed to be multi-functional, capable of operating in both SIMD and MIMD modes. This universality allows the same hardware components to serve different execution modes, reducing the need for dedicated hardware for each mode and thereby simplifying overall hardware design while maintaining high productivity
3Productivity
If a processor with fixed MIMD structure is built, then multiple front end units are always available for parallel processing, but the processor must be built to provide multiple front end units even when not all are actually being used, increasing cost
Solution Approach 1:
The processor implements dynamic front end unit activation where additional front end units are brought into service only when parallel processing is actually required. This dynamic resource allocation allows the system to maintain full parallel processing capability when needed while avoiding the manufacturing cost of permanently provisioning all possible front end units
Solution Approach 2:
The system changes the operational parameter of front end unit count from a fixed value to a variable value based on workload requirements. By adjusting the number of active front end units dynamically, the processor achieves cost-effective manufacturing while maintaining the ability to provide high parallel processing productivity when required
Data Source
AI summary
Embodiments include a processor capable of supporting multi-mode and corresponding methods. The processor includes front end units, a number of processing elements more than a number of the front end units; and a controller configured to determine if thread divergence occurs due to conditional branching. If there is thread divergence, the processor may set control information to control processing elements using currently activated front end units. If there is not, the processor may set control information to control processing elements using a currently activated front end unit.