Processor Dynamic Mode Switching via PRVS and ENFB Registers
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Solution Overview
Problem
Modern computing systems face challenges in dynamically controlling secure and performance modes of operation in processors, which are typically set at boot time and cannot be changed without rebooting the system.
Innovation Solution
A system and method that allow for dynamic switching between secure and performance modes in a processor without rebooting, by utilizing configuration registers with Privilege Entry (PRVS) and Enforce Below (ENFB) fields to control the mode of operation for different privilege levels and control aspects.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If the processor operates in performance mode with performance optimizations enabled, then processing speed and efficiency are improved, but security vulnerabilities increase due to side-channel attacks
Solution Approach 1:
The patent implements dynamic switching between performance mode and secure mode through configuration registers (PRVS and ENFB) that allow the processor to change its operational characteristics at runtime. The mode switching is controlled by software without requiring processor reset, enabling the system to adapt between high-performance operation and secure operation based on current security requirements and threat models.
2Reliability
If the processor configuration is fixed at boot time to ensure security, then security is improved, but flexibility and adaptability decrease
Solution Approach 1:
The configuration registers PRVS and ENFB enable dynamic reconfiguration of processor security attributes during runtime. Software can modify these registers to switch between secure mode and performance mode without resetting the processor, providing both security guarantees when needed and performance optimization when appropriate, thus achieving both reliability and adaptability.
Solution Approach 2:
The patent changes the operational parameters of the processor by modifying configuration register values (PRVS and ENFB) to switch between different security and performance modes. This parameter-based control allows flexible adaptation of processor behavior to match varying security requirements and workload characteristics without hardware redesign or system reboot.
3Reliability
If the processor is rebooted to change security mode, then mode switching is achieved, but system downtime and productivity loss increase
Solution Approach 1:
The patent enables dynamic mode switching through configuration registers that can be modified at runtime without processor reset. The PRVS and ENFB registers allow software to switch between secure mode and performance mode immediately, eliminating the need for system reboot and avoiding associated downtime, thus maintaining continuous productivity while ensuring security when required.
4Productivity
If performance optimizations are enabled in the micro-architecture, then processing efficiency is improved, but side-channel security vulnerabilities are exposed
Solution Approach 1:
The patent dynamically controls the enablement of performance optimizations through the PRVS configuration register, which can switch between performance mode (with optimizations enabled) and secure mode (with optimizations disabled or restricted). This dynamic control allows the processor to maximize performance efficiency when security threats are not present while minimizing security vulnerabilities when threats are detected or anticipated, without requiring permanent hardware changes.
Data Source
AI summary
A computer system, processor, and/or method for changing the mode of operation of a computer without rebooting includes: a processor having a configuration register, the configuration register having a privilege entry (PRVS) register field for each of one or more privilege levels, each PRVS register field for each privilege level having one or more control aspect entries; and an enforce below (ENFB) register field, each ENFB register field for each privilege level having one or more control aspect entries, the PRVS register field control aspects being equal in number to and corresponding to the ENRB register field control aspects. The PRVS register fields and the ENFB register fields are used to change the processor from a secure mode to a performance mode while running software applications.