Processor-Element Array Reconfiguration for Flexible High-Speed Computing
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Solution Overview
Problem
Existing array type processors lack flexibility while maintaining high operation performance, leading to inefficiencies in processing and utilization of hardware accelerators for tasks like deep learning processing.
Innovation Solution
A semiconductor device with a data path comprising multiple processor elements, a state transition management unit, and parallel computing units that allow for flexible reconfiguration of the data path and processing operations, enabling high-speed and flexible processing.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Adaptability or versatility
If array type processor uses fixed configuration architecture, then operation performance is maintained, but processing flexibility is reduced
Solution Approach 1:
The patent implements dynamic reconfiguration of the array type processor by allowing the data path configuration to be changed during operation. The state transition management unit enables the system to transition between different operational states, dynamically adjusting the connections and operations of processor elements based on the processing tasks requirements, thus achieving high processing flexibility without sacrificing operational performance.
Solution Approach 2:
The patent changes the configuration parameters of the data path through state transition management. By managing state transitions and allowing reconfiguration of connections and operations, the system can adapt to different processing scenarios. This parameter change approach enables the processor to maintain high operation performance while achieving flexible processing capabilities for various applications.
2Adaptability or versatility
If array type processor implements dynamic reconfiguration, then processing flexibility is improved, but operation performance may be compromised
Solution Approach 1:
The patent employs preliminary action by pre-defining multiple operational states and transition paths for the data path configuration. The state transition management unit is designed to handle reconfiguration requests efficiently by preparing and executing transitions in advance, ensuring that the processor can switch between different processing modes without significant performance penalty and maintain high operation performance while achieving flexibility.
Solution Approach 2:
The patent ensures continuity of useful action by designing the reconfiguration mechanism to minimize interruptions in data processing. The state transition management unit coordinates configuration changes during operational cycles, allowing the array type processor to maintain continuous computation with minimal pause or performance degradation, thus preserving high operation performance while enabling flexible processing.
3Adaptability or versatility
If data path configuration is frequently changed, then adaptability is improved, but reconfiguration overhead increases
Solution Approach 1:
The patent implements feedback mechanisms where the state transition management unit monitors processing requirements and triggers reconfiguration only when necessary. By receiving feedback about task requirements and comparing them with current configuration, the system can avoid unnecessary reconfiguration operations, reducing reconfiguration overhead and time loss while maintaining high adaptability for actual processing needs.
Data Source
AI summary
A semiconductor device includes a data path having a plurality of processor elements, a state transition management unit managing a state of the data path, and a parallel computing unit in which an input and an output of data is sequentially carried out, and an output of the parallel computing unit is capable of being handled by the plurality of processor elements.