Data Processor Queue Error State and Barrier Segmentation

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Solution Overview

Problem

In data processing systems, errors during the execution of operations by a data processor can lead to propagation of errors and require restarting the entire program, as the data processor lacks knowledge of data dependencies between operations, making it difficult to recover from errors without discarding and rebuilding all queued work.

Innovation Solution

Implementing an error state mechanism where the data processor sets a queue into an error state upon encountering an error, allowing only control plane operations to continue while halting data processing operations with dependencies, and using error barriers to divide operations into independent sets, enabling recovery without restarting the entire program.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Productivity

If the data processor executes operations from a queue without knowledge of data dependencies, then the processing can continue smoothly, but errors propagate and require restarting the entire program

Engineering Contradiction:
Improveprocessing throughputVSAvoiderror recovery capability
Core Design Contradiction:
ProductivityVSReliability

Solution Approach 1:

The patent segments the queue of operations by introducing error barrier instructions that divide operations into independent sets. When an error occurs, the segmentation allows the system to identify and isolate the affected segment without impacting other segments, enabling partial recovery rather than full program restart.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The patent introduces an error state mechanism as an intermediary between the data processor and the queue of operations. This intermediary tracks data dependencies and error states, allowing the processor to continue executing operations while the intermediary monitors and manages error propagation, preventing catastrophic failures.

Inventive Principle:
Principle #24Intermediary (Mediator)

2Reliability

If the entire program is restarted upon error, then error propagation is prevented, but all queued work must be discarded and rebuilt

Engineering Contradiction:
Improveerror handling correctnessVSAvoidprogram restart overhead
Core Design Contradiction:
ReliabilityVSLoss of time

Solution Approach 1:

By segmenting the operation queue using error barrier instructions, the patent enables selective recovery where only the affected segment needs to be reprocessed. This eliminates the need to discard and rebuild the entire queue, reducing time loss while maintaining error handling correctness.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The patent implements preliminary error barrier instructions that are inserted into the queue before execution. These barriers pre-establish segmentation points that facilitate efficient error recovery, allowing the system to quickly identify and reprocess only the necessary segments without full program restart.

Inventive Principle:
Principle #10Preliminary action

3Reliability

If all operations are halted upon error, then error propagation stops, but control plane operations that could continue are blocked

Engineering Contradiction:
Improveerror containmentVSAvoidcontinued execution capability
Core Design Contradiction:
ReliabilityVSProductivity

Solution Approach 1:

The patent applies local quality by implementing differentiated error handling for different types of operations. Data plane operations that depend on error-prone operations are halted to contain errors, while control plane operations that are independent continue to execute, optimizing both error containment and productivity.

Inventive Principle:
Principle #3Local quality

Solution Approach 2:

The patent changes the execution state parameter of operations based on error conditions and dependency analysis. Instead of a uniform halt, the system dynamically adjusts which operations continue or stop, allowing control plane operations to proceed while data plane operations are contained, thereby maintaining productivity alongside error containment.

Inventive Principle:
Principle #35Parameter changes

Data Source

PatentUS10824468B2Control of instruction execution in a data processor
Publication Date: 2020.11.03 ARM LTD
  • US10824468B2 patent drawing
  • US10824468B2 patent drawing
  • US10824468B2 patent drawing

AI summary

A method of controlling a data processor to perform data processing operations is disclosed in which a host processor prepares one or more queue(s) of operations for execution by the data processor. When an error is encountered in the processing of an operation for one of the one or more queue(s), a queue can be set into an error state in which instructions that may have a data dependency on another operation are not executed. The host processor includes in the queues error barrier instructions that divide the respective queues into sets of operations between which there are no data processing dependencies. An error state for a queue can thus be cleared when its processing reaches the next error barrier instruction in the queue.