Local Clock Frequency Throttling for Processor Brown-Out Control
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Solution Overview
Problem
Data center processor-based systems face challenges in managing power demand and consumption due to sudden changes in power availability, leading to potential brown-out conditions and malfunctioning processors, especially when operating at high frequencies for data-intensive workloads.
Innovation Solution
The implementation of configurable local frequency throttling management in processor-based systems, which includes a clock control circuit that dynamically throttles the frequency of the clock signal in response to frequency throttle events, such as thermal conditions or reduced power availability, to reduce power demand and consumption, allowing the processor to continue operating under interrupted or reduced power supply conditions.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If the processor operates at higher operating frequencies to provide high performance, then productivity is improved, but power consumption increases
Solution Approach 1:
The patent implements dynamic frequency adjustment by monitoring power availability and automatically adjusting the processor operating frequency accordingly. The system transitions from static frequency operation to dynamic frequency scaling, allowing the processor to operate at high frequencies when power is abundant and reduce frequency when power availability decreases, thus resolving the contradiction between performance and power consumption.
Solution Approach 2:
The patent changes the operating frequency parameter of the processor based on power availability conditions. By monitoring power delivery status and adjusting the frequency parameter dynamically, the system optimizes the balance between performance output and power consumption, enabling high productivity when power permits while preventing excessive power draw when supply is limited.
2Reliability
If the processor suddenly reduces power demand by throttling voltage, then reliability is improved, but productivity is worsened due to di/dt issues causing brown-out conditions
Solution Approach 1:
The patent implements preliminary frequency reduction before voltage throttling occurs. By detecting power availability changes early and proactively reducing the operating frequency in advance, the system prevents sudden current drops and di/dt issues that would cause brown-out conditions. This preliminary action maintains reliability while minimizing productivity loss.
Solution Approach 2:
The patent skips the intermediate voltage throttling step by directly adjusting frequency in response to power availability changes. Instead of following the conventional approach of voltage reduction that causes di/dt issues, the system rushes through to a frequency-adjusted state that achieves power demand reduction without triggering brown-out conditions, thus maintaining both reliability and productivity.
3Reliability
If a fixed power budget is established for processor-based systems, then reliability is improved, but adaptability is worsened when sudden changes in power availability occur
Solution Approach 1:
The patent transforms the static fixed power budget approach into a dynamic power management system. The system continuously monitors power availability and automatically adjusts operating frequency in real-time, enabling the processor to adapt to sudden power changes while maintaining stable operation. This dynamic approach preserves reliability through controlled adjustments while gaining adaptability to varying power conditions.
Solution Approach 2:
The patent implements a feedback mechanism where power availability status is continuously monitored and used to adjust the operating frequency. The system receives feedback about power delivery conditions and responds by modifying frequency settings, creating a closed-loop control system that maintains reliability through stable operation while adapting to changing power availability conditions.
Data Source
AI summary
Processor-based systems employing configurable local frequency throttling management to manage power demand and consumption, and related methods. For example, such processor-based systems may include a processor and other power circuitry to control power to the processor. The processor includes a clock control circuit that is configured generate a clock signal(s) at a designated frequency to clock a processor core(s) in the processor at a desired operating frequency(ies). The clock control circuit is configured to dynamically throttle (i.e., limit and/or reduce) the frequency(ies) of a clock signal(s) clocking the processor in response to a frequency throttle event that may be an unexpected event. Reducing power demand may be important to ensure that the processor can continue to operate under interrupted or reduced power supply conditions. It may be faster to throttle the operating frequency of a processor than to throttle the operating voltage of power supplied to the processor.