Processor Frequency Adjustment Using Lockstep Core Synchronization

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Solution Overview

Problem

Existing methods for adjusting processor frequency do not effectively account for core redundancy and error detection, leading to inefficiencies and potential errors in processor operations.

Innovation Solution

Implementing a lockstep mode using a firmware engine to synchronize and compare output data from multiple processor cores, adjusting frequency based on error detection and synchronization, and utilizing a lookup table to determine optimal frequency settings.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Productivity

If processor frequency is increased to improve performance, then productivity increases, but reliability decreases due to potential errors and lack of error detection

Engineering Contradiction:

Improveprocessor performanceVSAvoiderror detection capability

Core Design Contradiction:

ProductivityVSReliability

Solution Approach 1:

The patent implements lockstep mode where a second core executes identical instructions as a first core, creating a copy of the computational process. This duplicate execution enables error detection by comparing outputs from both cores, allowing the system to maintain high frequency operation while ensuring reliability through redundancy.

Inventive Principle:

Principle #26Copying

2Reliability

If lockstep mode is implemented with multiple cores executing identical instructions, then reliability improves through error detection, but device complexity increases

Engineering Contradiction:

Improveerror detection capabilityVSAvoidcore synchronization mechanism

Core Design Contradiction:

ReliabilityVSDevice complexity

Solution Approach 1:

The patent combines error detection functionality with existing processor cores by enabling lockstep mode between available cores rather than requiring separate dedicated error detection hardware. This merging approach allows reliable error detection while utilizing existing computational resources, reducing the need for additional complex components.

Inventive Principle:

Principle #5Merging (Combining)

Solution Approach 2:

The processor cores serve multiple functions: they execute application instructions during normal operation and simultaneously execute identical instructions in lockstep mode for error detection. This multi-functionality allows the same hardware resources to provide both computational performance and reliability verification without requiring dedicated error detection hardware.

Inventive Principle:

Principle #6Universality (Multi-functionality)

3Adaptability or versatility

If frequency lookup table is used to adjust operating frequency, then adaptability improves, but loss of time occurs due to frequency adjustment delays

Engineering Contradiction:

Improvefrequency adjustment capabilityVSAvoidfrequency adjustment delay

Core Design Contradiction:

Adaptability or versatilityVSLoss of time

Solution Approach 1:

The patent pre-calculates and stores optimal frequency settings in a lookup table based on core allocation scenarios. When cores are allocated to applications, the system can quickly retrieve the appropriate frequency setting from the pre-computed table rather than calculating optimal frequency in real-time, reducing adjustment delays while maintaining adaptability to different operational conditions.

Inventive Principle:

Principle #10Preliminary action

Data Source

PatentUS12530270B2Frequency adjustment for processors

Publication Date: 2026.01.20 NVIDIA CORP

AI summary

Apparatuses, systems, and techniques adjust a frequency at which a processor operates. In at least one embodiment, a frequency at which a processor operates is adjusted based, at least in part, on different cores of the processor performing one or more identical instructions.