Processor Core Frequency Adjustment With Load And PMU Feedback

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Solution Overview

Problem

Existing methods for adjusting processor frequency based on load values fail to effectively reduce power consumption and improve energy efficiency in servers, as they do not adequately consider the actual load conditions and performance bottlenecks.

Innovation Solution

A frequency adjustment method that considers both load average and performance monitoring unit (PMU) status to dynamically adjust processor core frequency, avoiding unnecessary power consumption by matching the frequency to the actual load and preventing performance bottlenecks.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Productivity

If frequency of processor core is increased to improve computing performance, then productivity is improved, but power consumption increases

Engineering Contradiction:
Improvecomputing performanceVSAvoidpower consumption
Core Design Contradiction:
ProductivityVSUse of energy by moving object

Solution Approach 1:

The patent implements dynamic frequency adjustment by continuously monitoring PMU status and load average, then adapting the processor core frequency in real-time. The frequency is dynamically increased when PMU status indicates performance bottleneck and load average is high, and dynamically decreased when load average is low, transforming the static frequency-design contradiction into a dynamic optimization problem that resolves itself through feedback control

Inventive Principle:
Principle #15Dynamics

Solution Approach 2:

The patent establishes a feedback mechanism where PMU status and load average are continuously monitored and fed back to the frequency adjustment domain. The feedback signal from PMU status (indicating performance bottleneck) and load average directly controls the frequency adjustment decision, creating a closed-loop system that automatically balances productivity and power consumption based on actual system conditions

Inventive Principle:
Principle #23Feedback

2Use of energy by moving object

If frequency of processor core is adjusted based on load value to reduce power consumption, then power consumption is reduced, but energy efficiency ratio is not properly improved

Engineering Contradiction:
Improvepower consumptionVSAvoidenergy efficiency ratio
Core Design Contradiction:
Use of energy by moving objectVSProductivity

Solution Approach 1:

The patent introduces PMU status as a feedback signal that indicates whether the processor core has reached performance bottleneck. This feedback mechanism ensures that frequency adjustment is not solely based on load value but also on actual performance status, preventing premature frequency reduction that would harm energy efficiency ratio while still achieving power consumption reduction

Inventive Principle:
Principle #23Feedback

Solution Approach 2:

The patent changes the parameter basis from single load value to combined parameters of load average and PMU status. This multi-parameter approach allows more precise frequency adjustment that simultaneously optimizes both power consumption and energy efficiency ratio by considering both workload magnitude and performance bottleneck status

Inventive Principle:
Principle #35Parameter changes

3Productivity

If frequency of processor core is increased to match high estimated load value, then productivity is improved, but power consumption waste increases when performance bottleneck is reached

Engineering Contradiction:
Improvecomputing performanceVSAvoidpower consumption waste
Core Design Contradiction:
ProductivityVSLoss of energy

Solution Approach 1:

The patent uses PMU status as a feedback signal that detects performance bottleneck conditions. When PMU status indicates bottleneck, the feedback mechanism triggers frequency decrease even if load average remains high, preventing energy waste from continuing to run at high frequency when performance is already bottlenecked

Inventive Principle:
Principle #23Feedback

Solution Approach 2:

The patent converts the harmful effect of performance bottleneck (which normally would cause energy waste) into a beneficial control signal. The PMU status indicating bottleneck is interpreted as a signal to reduce frequency, transforming the bottleneck condition from a harmful state into a useful feedback for energy-efficient operation

Inventive Principle:
Principle #22Blessing in disguise (Convert harm into benefit)

Data Source

PatentUS20250321851A1Frequency adjustment method and apparatus, processor, chip, and computer device
Publication Date: 2025.10.16 HUAWEI TECH CO LTD
  • US20250321851A1 patent drawing
  • US20250321851A1 patent drawing
  • US20250321851A1 patent drawing

AI summary

In accordance with an embodiment, a method includes: obtaining a load average and a performance monitoring unit (PMU) status in a frequency adjustment domain; and adjusting a frequency of a processor core in the frequency adjustment domain based on the load average and the PMU status. The load average indicates an average of load values of all processor cores in the frequency adjustment domain when different processor cores execute tasks, and the PMU status indicates whether a running value of a PMU event reported by the processor core in the frequency adjustment domain reaches a threshold corresponding to the PMU event.