Processor Hash Execution Unit Register Swapping Mechanism
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Solution Overview
Problem
Current processor architectures face inefficiencies in executing hash operations, particularly with the SM3 hash function, due to the high number of dependent operations required, leading to poor performance in software implementations.
Innovation Solution
The introduction of new instructions and hardware support for efficiently executing the SM3 hashing algorithm, utilizing 128-bit or 256-bit registers to optimize the processing of SM3 state variables, allowing for reduced computation by reusing and swapping register designations across rounds, and implementing specific instructions like SM3RND to perform multiple rounds in fewer processor cycles.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If software implementations are used for SM3 hash operations, then device complexity is reduced, but processing speed and productivity deteriorate due to high number of dependent operations
Solution Approach 1:
The patent segments the SM3 hash operation into distinct functional components: state variable storage (A-H), message word processing (W0-W15), and round function execution. This segmentation allows each component to be optimized independently, with dedicated hardware units for state management and message processing, thereby improving overall processing speed while maintaining manageable architectural complexity
Solution Approach 2:
The patent introduces intermediary hardware structures including register files for state variables, message buffers for input data, and temporary storage for intermediate calculations. These intermediaries facilitate efficient data flow between functional units, reducing the number of dependent operations required and enabling parallel processing of hash rounds
2Loss of time
If traditional processor architectures are used for SM3 hashing, then ease of manufacture is maintained, but execution time increases due to sequential dependent operations
Solution Approach 1:
The patent implements preliminary action by pre-loading message words into dedicated buffers and pre-initializing state variables before the main hash computation begins. This allows the actual hashing rounds to execute more efficiently without sequential dependencies, reducing execution time while maintaining operational simplicity through automated setup procedures
Solution Approach 2:
The patent introduces dynamic resource allocation where execution units can be allocated and deactivated based on the specific hash round being performed. This dynamic approach allows the processor to optimize resource usage during different phases of the hash computation, reducing execution time without requiring complex static architectural changes
3Productivity
If multiple dependent operations are performed sequentially for SM3 rounds, then computational accuracy is maintained, but processing throughput decreases
Solution Approach 1:
The patent merges multiple dependent operations into unified functional units that can execute simultaneously. For example, multiple state variable updates and message word transformations are combined into parallel execution units, allowing multiple hash rounds to progress concurrently while maintaining computational accuracy through synchronized data dependencies
Solution Approach 2:
The patent ensures continuity of useful action by implementing pipelined execution where hash round computations are continuously fed into the execution units without idle cycles. Intermediate results from one round immediately become inputs for the next round, eliminating gaps in computation and maximizing throughput while preserving accuracy through continuous data flow
Data Source
AI summary
An apparatus and method are described for executing hash functions on a processor. For example, one embodiment of a processor comprises: a register set including a first storage location and a second storage location in which state variables for a hash function are to be stored; an execution unit to execute the hash function and to initially designate the first storage location as storing a first set of state values used for computing rounds of the hash function, and to initially designate a second storage location as storing a second set of state values also used for computing the rounds of the hash function; and the execution unit to execute a plurality of rounds of the hash function using the first and second sets of state data, wherein executing includes swapping the designations of the first storage location and second storage location such that the first storage location is designated to store the first set of state values for a first set of rounds and the second set of state values for a second set of rounds, and wherein the second storage location is designated to store the second set of state values for the first set of rounds and the first set of state values for the second set of rounds.