Multi-threaded Processor Instruction Balancing via Branch Uncertainty

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Solution Overview

Problem

In multi-threaded processing environments, existing branch prediction methods do not account for the accuracy of branch predictions, leading to performance limitations due to resource sharing among threads, where a stalled thread can consume resources that could be used by other threads for non-throws-away work, causing inefficiencies and reduced throughput.

Innovation Solution

The method involves calculating and tracking the uncertainty of each predicted branch, propagating this uncertainty through the pipeline, and balancing instruction execution based on the summation of branch uncertainties to prioritize threads with higher confidence predictions, ensuring fair resource allocation and maximizing throughput.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Productivity

If multiple threads share pipeline resources on a first come first serve basis, then resource utilization is improved, but thread hogging occurs where a stalled thread consumes resources that could be used by other threads

Engineering Contradiction:
Improveresource utilizationVSAvoidfair resource allocation
Core Design Contradiction:
ProductivityVSReliability

Solution Approach 1:

The patent implements dynamic resource allocation by transitioning from a static first-come-first-serve scheme to a dynamic uncertainty-based prioritization system. The issue queue dynamically adjusts thread priority based on current pipeline uncertainty metrics, allowing the resource allocation policy to adapt in real-time to pipeline conditions and prevent thread hogging

Inventive Principle:
Principle #15Dynamics

Solution Approach 2:

The patent changes the allocation parameter from simple arrival time (first-come-first-serve) to a composite parameter incorporating branch uncertainty and pipeline state. This parameter transformation enables the system to differentiate between threads based on their likelihood of producing useful work, thereby preventing stalled threads from monopolizing resources

Inventive Principle:
Principle #35Parameter changes

2Ease of operation

If branch prediction uses a 2-bit saturating counter, then branch direction prediction is provided, but prediction accuracy is not tracked leading to throw-away work

Engineering Contradiction:
Improvebranch prediction simplicityVSAvoidprediction accuracy
Core Design Contradiction:
Ease of operationVSMeasurement precision

Solution Approach 1:

The patent segments the branch prediction information into two distinct components: the 2-bit saturating counter for direction prediction and a separate uncertainty metric for accuracy tracking. This segmentation allows the system to maintain the simplicity of the traditional counter while adding precision through the uncertainty measurement without interfering with the existing prediction mechanism

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The patent introduces uncertainty as an intermediary metric that mediates between the simple 2-bit counter and the complex task of accuracy assessment. This intermediary provides a quantitative measure of prediction confidence that bridges the gap between the crude counter mechanism and the need for precise accuracy tracking, enabling informed decisions about instruction issuance

Inventive Principle:
Principle #24Intermediary (Mediator)

3Productivity

If instructions are balanced based on summation of instruction uncertainty, then throughput is improved by prioritizing high confidence predictions, but pipeline complexity increases

Engineering Contradiction:
ImprovethroughputVSAvoidpipeline complexity
Core Design Contradiction:
ProductivityVSDevice complexity

Solution Approach 1:

The patent applies partial action by implementing uncertainty tracking and balancing only for branch instructions rather than all instructions. This selective approach captures the majority of uncertainty sources in the pipeline while avoiding the excessive complexity that would result from tracking uncertainty for every instruction type, thereby achieving throughput improvement with moderate complexity increase

Inventive Principle:
Principle #16Partial or excessive action

Data Source

PatentUS9298466B2Multi-threaded processor instruction balancing through instruction uncertainty
Publication Date: 2016.03.29 INTERNATIONAL BUSINESS MACHINE CORPORATION
  • US9298466B2 patent drawing
  • US9298466B2 patent drawing
  • US9298466B2 patent drawing

AI summary

A computer-implemented method for instruction execution in a pipeline, includes fetching, in the pipeline, a plurality of instructions, wherein the plurality of instructions includes a plurality of branch instructions, for each of the plurality of branch instructions, assigning a branch uncertainty to each of the plurality of branch instructions, for each of the plurality of instructions, assigning an instruction uncertainty that is a summation of branch uncertainties of older unresolved branches, and balancing the instructions, based on a current summation of instruction uncertainty, in the pipeline.