Processor Instruction Scheduling via Source Parent Tracking
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Solution Overview
Problem
Conventional out-of-order instruction scheduling in microprocessors requires a large scheduler window and depth to minimize stalling, but this increases the number of comparisons quadratically, leading to performance loss and increased silicon area for comparison circuits.
Innovation Solution
The processor tracks operation source parent information to reduce the number of comparisons needed for instruction scheduling, allowing for a physically smaller and faster comparison circuit by focusing comparisons on specific source parents rather than all potential producers.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If the scheduler window depth and width are increased to minimize stalling, then the likelihood of finding ready instructions for execution is improved, but the number of comparisons grows quadratically causing performance loss and increased silicon area
Solution Approach 1:
The patent segments the comparison operation into two distinct phases: (1) a quick parent instruction identification phase that uses pre-stored parent information to rapidly determine which producer instructions are relevant, and (2) a focused comparison phase that only compares consumer instructions against their identified parent producers. This segmentation avoids the quadratic growth of comparing all consumer instructions against all potential producers, thereby reducing comparison circuit complexity while maintaining scheduler depth and width for high throughput.
2Reliability
If conventional comparison methods are used to evaluate all fetched instructions, then complete dependency checking is achieved, but the comparison time and circuit area increase quadratically with scheduler depth and width
Solution Approach 1:
The patent performs preliminary action by pre-storing parent instruction information (producer identification) with each consumer instruction in the scheduler window. When dependency checking is needed, the system has already prepared the relevant parent information, allowing for rapid identification and comparison only with the actual producer instructions. This eliminates the need for time-consuming exhaustive comparisons against all potential producers in the scheduler window, significantly reducing comparison time while maintaining complete dependency checking accuracy.
Data Source
AI summary
Instruction scheduling in a processor using operation source parent tracking. A source parent is a producer instruction whose execution generates a produced value consumed by a consumer instruction. The processor is configured to track identifying operation source parent information for instructions processed in a pipeline and providing such operation source parent information to a scheduling circuit along with the associated consumer instruction. The scheduling circuit is configured to perform instruction scheduling using operation source parent tracking on received instruction(s) to be scheduled for execution. The processor is configured to compare sources and destinations for each of the instructions to be scheduled based on the operation source parent information to determine instructions ready for scheduling for execution. Given availability of the operation source parent information for instructions to be scheduled, the processor can perform a reduced number of comparisons of the sources and destinations for instructions to be scheduled.