Processor-Integrated Offset Voltage for Fast Transient Regulation
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Solution Overview
Problem
The complexity of circuit boards is increased due to the need for a parallel or serial bus connection between processors and voltage regulating members, which prolongs the time for closed-loop voltage regulation, hindering transient system performance in electronic devices like GPUs.
Innovation Solution
A power source management system with a processor having a core voltage input and feedback terminal, and a voltage regulating member with a fixed reference voltage, where an offset voltage is provided between the input and feedback terminals to regulate the core voltage based on a fixed reference, eliminating the need for bus communication between the processor and voltage regulating member.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If a parallel bus or serial bus is used for connection between the processor and voltage regulating member, then the voltage regulation function is achieved, but the circuit board complexity is increased and the closed-loop regulation time is extended
Solution Approach 1:
The patent merges the voltage regulation control function directly into the processor by integrating the offset voltage generation circuitry. This eliminates the need for separate bus connections between the processor and voltage regulating member, as the processor can now directly provide the offset voltage to the voltage regulating member through integrated circuits, thereby reducing circuit board complexity while maintaining voltage regulation functionality.
Solution Approach 2:
The patent introduces an offset voltage as an intermediary parameter that bridges the processor and voltage regulating member. Instead of requiring complex bus communication protocols, the processor generates an offset voltage that directly represents the desired core voltage adjustment, which is then applied by the voltage regulating member. This intermediary approach simplifies the interaction interface and reduces communication overhead.
2Reliability
If a parallel bus or serial bus is used for connection between the processor and voltage regulating member, then the voltage regulation function is achieved, but the closed-loop regulation time is extended and transient performance is degraded
Solution Approach 1:
The patent extracts the offset voltage generation function from the external voltage regulating member and relocates it directly into the processor. This extraction eliminates the need for bus communication delays in the feedback loop, as the processor can immediately generate and apply offset voltage adjustments based on its internal voltage predictions, significantly reducing closed-loop regulation time and improving transient performance.
Solution Approach 2:
The patent implements preliminary action by having the processor predict the required core voltage in advance based on current load conditions and generate the corresponding offset voltage before it is actually needed. This proactive approach allows the voltage regulating member to receive pre-calculated voltage adjustment commands, eliminating waiting time in the closed-loop regulation process and improving transient response.
Data Source
AI summary
A power source management system of a circuit board that comprises: a processor, comprising a core voltage input terminal; and a core voltage feedback terminal; and a voltage regulating member, comprising a setting terminal with a fixed reference voltage provided thereto; a detecting terminal connected to the core voltage feedback terminal to detect a feedback core voltage from the core voltage feedback terminal; and a core voltage output terminal connected to the core voltage input terminal to provide a core voltage thereto, wherein the core voltage is regulated by the voltage regulating member based on the feedback core voltage, such that the feedback core voltage is equal to the fixed reference voltage, wherein an offset voltage equal to a difference between a desired core voltage of the processor and the fixed reference voltage is provided between the core voltage input terminal and the core voltage feedback terminal by the processor.

