Application Processor Interrupt Aggregation for Low-Power PCIe Reliability

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Solution Overview

Problem

Existing semiconductor devices face challenges in achieving low-power PCIe interfaces while maintaining high processing speeds, leading to potential unintended malfunctions during debugging and recovery processes.

Innovation Solution

Incorporating an interrupt aggregation and debug unit within the application and automotive electronic processors that can automatically detect and recover from malfunctions in communication interfaces by managing and processing interrupts independently of the central processing unit, thereby reducing workload and improving resource efficiency.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Use of energy by moving object

If low-power design is implemented in PCIe interface, then energy consumption is reduced, but malfunction risk increases

Engineering Contradiction:

Improveenergy consumptionVSAvoidmalfunction risk

Core Design Contradiction:

Use of energy by moving objectVSReliability

Solution Approach 1:

The patent introduces an interrupt aggregation and debug unit as an intermediary component between the PCIe interface and the central processing unit. This unit independently monitors communication states, aggregates interrupt signals, and handles debugging operations, thereby reducing the workload on the CPU while ensuring reliable detection and recovery from malfunctions in low-power PCIe operations.

Inventive Principle:

Principle #24Intermediary (Mediator)

Solution Approach 2:

The patent segments the interrupt handling functionality by creating a dedicated interrupt aggregation and debug unit separate from the central processing unit. This segmentation allows independent monitoring and handling of PCIe communication states, enabling the system to maintain reliability through specialized debugging capabilities while the CPU focuses on primary computation tasks, thus supporting low-power operation.

Inventive Principle:

Principle #1Segmentation

2Reliability

If debugging functionality is added to detect malfunctions, then reliability is improved, but device complexity increases

Engineering Contradiction:

Improvedebugging capabilityVSAvoidstructure complexity

Core Design Contradiction:

ReliabilityVSDevice complexity

Solution Approach 1:

The patent merges multiple functions into the interrupt aggregation and debug unit: interrupt signal reception, interrupt aggregation, state monitoring, and debugging operations. By combining these functionalities in a single integrated unit rather than distributing them across separate components, the patent reduces overall device complexity while maintaining comprehensive debugging and reliability capabilities.

Inventive Principle:

Principle #5Merging (Combining)

Solution Approach 2:

The interrupt aggregation and debug unit is designed as a multi-functional component that can handle various types of interrupt signals, monitor different communication states, and perform multiple debugging operations. This universality allows a single unit to provide comprehensive reliability enhancement without requiring multiple specialized components, thereby avoiding increased device complexity.

Inventive Principle:

Principle #6Universality (Multi-functionality)

3Productivity

If interrupt aggregation unit is introduced, then CPU workload is reduced, but device complexity increases

Engineering Contradiction:

ImproveCPU efficiencyVSAvoidcircuit complexity

Core Design Contradiction:

ProductivityVSDevice complexity

Solution Approach 1:

The interrupt aggregation and debug unit serves as an intermediary that handles interrupt signal processing independently before presenting aggregated results to the CPU. This intermediary function reduces CPU workload by filtering, aggregating, and pre-processing interrupt signals, while the integrated design of this intermediary unit minimizes the increase in overall device complexity.

Inventive Principle:

Principle #24Intermediary (Mediator)

Data Source

PatentUS11366732B2Application processor, automotive electronic processor, and computing device including application processor

Publication Date: 2022.06.21 SAMSUNG ELECTRONICS CO LTD

AI summary

An application processor includes a central processing unit, a root complex that communicates with at least one external device under control of the central processing unit and generates a state change interrupt when an operation state changes, and an interrupt aggregation and debug unit that performs debugging on at least one component associated with the state change interrupt depending on the state change interrupt.