Processor Interrupt Expansion Using Class-Based Source Identification

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Solution Overview

Problem

Conventional platforms are limited by a small number of interrupt vectors, leading to shared vectors among multiple interrupt sources, which complicates software identification and handling, and introduces latency and asymmetry in interrupt handling.

Innovation Solution

Implementing an interrupt expansion feature using in-memory data structures, such as bitmaps, to report additional information with interrupt vectors, effectively multiplying the number of distinguishable interrupt sources without sharing vectors or asymmetric handling.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Quantity of substance

If conventional interrupt vectors are used, then the system structure remains simple, but the number of distinguishable interrupt sources is limited

Engineering Contradiction:
Improvenumber of distinguishable interrupt sourcesVSAvoidsoftware complexity
Core Design Contradiction:
Quantity of substanceVSDevice complexity

Solution Approach 1:

The patent transitions from a flat interrupt vector system to a hierarchical structure by introducing interrupt classes as an additional dimension. Each interrupt vector is associated with an interrupt class, allowing the system to distinguish between multiple interrupt sources sharing the same vector by examining their class assignments. This dimensional expansion enables more interrupt sources without increasing the number of vectors.

Inventive Principle:
Principle #17Another dimension (Dimensionality change)

Solution Approach 2:

The patent segments interrupt sources into different classes based on their characteristics or origins. By dividing interrupt sources into classes and associating each class with specific vectors, the system can handle multiple interrupt sources that share vectors in an organized, segmented manner. This segmentation allows software to identify and handle different interrupt sources systematically despite sharing the same vector number.

Inventive Principle:
Principle #1Segmentation

2Loss of time

If multiple interrupt sources share the same vector, then the hardware structure remains simple, but interrupt handling latency increases

Engineering Contradiction:
Improveinterrupt handling latencyVSAvoidinterrupt handling complexity
Core Design Contradiction:
Loss of timeVSDevice complexity

Solution Approach 1:

The patent performs preliminary classification of interrupt sources into classes before the interrupt occurs. By pre-assigning interrupt sources to specific classes and storing this information in a lookup structure, the system eliminates the need for complex real-time identification during interrupt handling. This preliminary action allows for faster interrupt processing by avoiding real-time analysis during the critical interrupt path.

Inventive Principle:
Principle #10Preliminary action

3Adaptability or versatility

If interrupt vectors are shared, then the hardware resource usage is reduced, but symmetric interrupt handling becomes difficult

Engineering Contradiction:
Improveinterrupt handling flexibilityVSAvoidsoftware complexity
Core Design Contradiction:
Adaptability or versatilityVSDevice complexity

Solution Approach 1:

The patent makes interrupt vectors universal by allowing multiple interrupt sources to share the same vector while maintaining distinguishability through class associations. Each vector becomes multi-functional, capable of representing different interrupt sources depending on their class assignments. This universality enables flexible interrupt handling where the same vector can serve multiple purposes, and software can adaptively identify the specific source based on class information.

Inventive Principle:
Principle #6Universality (Multi-functionality)

Data Source

PatentUS12379956B2Processor interrupt expansion feature
Publication Date: 2025.08.05 INTEL CORP
  • US12379956B2 patent drawing
  • US12379956B2 patent drawing
  • US12379956B2 patent drawing

AI summary

An embodiment of an integrated circuit may comprise a processor with one or more cores and circuitry coupled to the one or more cores, the circuitry to control one or more interrupts based on an interrupt expansion data structure, and report information derived from the interrupt expansion data structure to a software interrupt handler. Other embodiments are disclosed and claimed.